1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 # Copyright 2019 Analog Devices Inc.
5 $id: http://devicetree.org/schemas/iio/adc/adi,ad7124.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Analog Devices AD7124 ADC device driver
11 - Stefan Popa <stefan.popa@analog.com>
14 Bindings for the Analog Devices AD7124 ADC device. Datasheet can be
16 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7124-8.pdf
25 description: SPI chip select number for the device
30 description: phandle to the master clock (mclk)
37 description: IRQ line for the ADC
47 description: refin1 supply can be used as reference for conversion.
50 description: refin2 supply can be used as reference for conversion.
53 description: avdd supply can be used as reference for conversion.
55 spi-max-frequency: true
65 "^channel@([0-9]|1[0-5])$":
69 Represents the external channels which are connected to the ADC.
74 The channel number. It can have up to 8 channels on ad7124-4
75 and 16 channels on ad7124-8, numbered from 0 to 15.
82 Select the reference source to use when converting on
83 the specific channel. Valid values are:
84 0: REFIN1(+)/REFIN1(−).
85 1: REFIN2(+)/REFIN2(−).
87 If this field is left empty, internal reference is selected.
88 $ref: /schemas/types.yaml#/definitions/uint32
95 adi,buffered-positive:
96 description: Enable buffered mode for positive input.
99 adi,buffered-negative:
100 description: Enable buffered mode for negative input.
107 additionalProperties: false
109 additionalProperties: false
114 #address-cells = <1>;
118 compatible = "adi,ad7124-4";
120 spi-max-frequency = <5000000>;
122 interrupt-parent = <&gpio>;
123 refin1-supply = <&adc_vref>;
124 clocks = <&ad7124_mclk>;
125 clock-names = "mclk";
127 #address-cells = <1>;
132 diff-channels = <0 1>;
133 adi,reference-select = <0>;
134 adi,buffered-positive;
140 diff-channels = <2 3>;
141 adi,reference-select = <0>;
142 adi,buffered-positive;
143 adi,buffered-negative;
148 diff-channels = <4 5>;
153 diff-channels = <6 7>;