1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-dfsdm-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 DFSDM ADC device driver
10 - Fabrice Gasnier <fabrice.gasnier@st.com>
11 - Olivier Moysan <olivier.moysan@st.com>
14 STM32 DFSDM ADC is a sigma delta analog-to-digital converter dedicated to
15 interface external sigma delta modulators to STM32 micro controllers.
16 It is mainly targeted for:
17 - Sigma delta modulators (motor control, metering...)
18 - PDM microphones (audio digital microphone)
20 It features up to 8 serial digital interfaces (SPI or Manchester) and
21 up to 4 filters on stm32h7 or 6 filters on stm32mp1.
23 Each child node matches with a filter instance.
37 Internal clock used for DFSDM digital processing and control blocks.
38 dfsdm clock can also feed CLKOUT, when CLKOUT is used.
39 - description: audio clock can be used as an alternate to feed CLKOUT.
58 SPI clock OUT frequency (Hz). Requested only for SPI master mode.
59 This clock must be set according to the "clock" property.
60 Frequency must be a multiple of the rcc clock frequency.
61 If not, SPI CLKOUT frequency will not be accurate.
72 additionalProperties: false
77 description: child node
86 description: Specifies the DFSDM filter instance used.
94 List of single-ended channels muxed for this ADC.
95 On stm32h7 and stm32mp1:
96 - For st,stm32-dfsdm-adc: up to 8 channels numbered from 0 to 7.
97 - For st,stm32-dfsdm-dmic: 1 channel numbered from 0 to 7.
98 $ref: /schemas/types.yaml#/definitions/uint32-array
103 st,adc-channel-names:
104 description: List of single-ended channel names.
105 $ref: /schemas/types.yaml#/definitions/string-array
109 SinC filter order from 0 to 5.
111 - [1-5]: order 1 to 5.
112 For audio purpose it is recommended to use order 3 to 5.
113 $ref: /schemas/types.yaml#/definitions/uint32
121 st,adc-channel-types:
123 Single-ended channel input type.
124 - "SPI_R": SPI with data on rising edge (default)
125 - "SPI_F": SPI with data on falling edge
126 - "MANCH_R": manchester codec, rising edge = logic 0, falling edge = logic 1
127 - "MANCH_F": manchester codec, rising edge = logic 1, falling edge = logic 0
129 enum: [ SPI_R, SPI_F, MANCH_R, MANCH_F ]
130 $ref: /schemas/types.yaml#/definitions/non-unique-string-array
132 st,adc-channel-clk-src:
134 Conversion clock source.
135 - "CLKIN": external SPI clock (CLKIN x)
136 - "CLKOUT": internal SPI clock (CLKOUT) (default)
137 - "CLKOUT_F": internal SPI clock divided by 2 (falling edge).
138 - "CLKOUT_R": internal SPI clock divided by 2 (rising edge).
140 enum: [ CLKIN, CLKOUT, CLKOUT_F, CLKOUT_R ]
141 $ref: /schemas/types.yaml#/definitions/non-unique-string-array
145 Must be defined if two sigma delta modulators are
146 connected on same SPI input.
147 If not set, channel n is connected to SPI input n.
148 If set, channel n is connected to SPI input n + 1.
153 Set to 1 to synchronize with DFSDM filter instance 0.
154 Used for multi microphones synchronization.
169 - st,adc-channel-names
171 - "#io-channel-cells"
178 const: st,stm32-dfsdm-adc
186 st,adc-channel-names:
190 st,adc-channel-types:
194 st,adc-channel-clk-src:
200 From common IIO binding. Used to pipe external sigma delta
201 modulator or internal ADC output to DFSDM channel.
210 const: st,stm32-dfsdm-dmic
217 st,adc-channel-names:
220 st,adc-channel-types:
223 st,adc-channel-clk-src:
233 description: child node
238 - st,stm32h7-dfsdm-dai
245 From common IIO binding. Used to pipe external sigma delta
246 modulator or internal ADC output to DFSDM channel.
258 const: st,stm32h7-dfsdm
273 const: st,stm32mp1-dfsdm
286 #include <dt-bindings/interrupt-controller/arm-gic.h>
287 #include <dt-bindings/clock/stm32mp1-clks.h>
288 dfsdm: dfsdm@4400d000 {
289 compatible = "st,stm32mp1-dfsdm";
290 reg = <0x4400d000 0x800>;
291 clocks = <&rcc DFSDM_K>, <&rcc ADFSDM_K>;
292 clock-names = "dfsdm", "audio";
293 #address-cells = <1>;
297 compatible = "st,stm32-dfsdm-dmic";
299 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
300 dmas = <&dmamux1 101 0x400 0x01>;
302 #io-channel-cells = <1>;
303 st,adc-channels = <1>;
304 st,adc-channel-names = "dmic0";
305 st,adc-channel-types = "SPI_R";
306 st,adc-channel-clk-src = "CLKOUT";
307 st,filter-order = <5>;
309 asoc_pdm0: dfsdm-dai {
310 compatible = "st,stm32h7-dfsdm-dai";
311 #sound-dai-cells = <0>;
312 io-channels = <&dfsdm0 0>;
316 dfsdm_pdm1: filter@1 {
317 compatible = "st,stm32-dfsdm-adc";
319 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
320 dmas = <&dmamux1 102 0x400 0x01>;
322 #io-channel-cells = <1>;
323 st,adc-channels = <2 3>;
324 st,adc-channel-names = "in2", "in3";
325 st,adc-channel-types = "SPI_R", "SPI_R";
326 st,adc-channel-clk-src = "CLKOUT_F", "CLKOUT_F";
327 io-channels = <&sd_adc2 &sd_adc3>;
328 st,filter-order = <1>;