1 The PDC driver manages data transfer to and from various offload engines
2 on some Broadcom SoCs. An SoC may have multiple PDC hardware blocks. There is
3 one device tree entry per block. On some chips, the PDC functionality is
4 handled by the FA2 (Northstar Plus).
7 - compatible : Should be "brcm,iproc-pdc-mbox" or "brcm,iproc-fa2-mbox" for
9 - reg: Should contain PDC registers location and length.
10 - interrupts: Should contain the IRQ line for the PDC.
12 - brcm,rx-status-len: Length of metadata preceding received frames, in bytes.
15 - brcm,use-bcm-hdr: present if a BCM header precedes each frame.
18 pdc0: iproc-pdc0@612c0000 {
19 compatible = "brcm,iproc-pdc-mbox";
20 reg = <0 0x612c0000 0 0x445>; /* PDC FS0 regs */
21 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
22 #mbox-cells = <1>; /* one cell per mailbox channel */
23 brcm,rx-status-len = <32>;