Documentation/devicetree/bindings/media/rockchip-vpu.yaml

   1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
   2
   3 %YAML 1.2
   4 ---
   5 $id: "http://devicetree.org/schemas/media/rockchip-vpu.yaml#"
   6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
   7
   8 title: Hantro G1 VPU codecs implemented on Rockchip SoCs
   9
  10 maintainers:
  11   - Ezequiel Garcia <ezequiel@collabora.com>
  12
  13 description:
  14   Hantro G1 video encode and decode accelerators present on Rockchip SoCs.
  15
  16 properties:
  17   compatible:
  18     enum:
  19       - rockchip,rk3288-vpu
  20       - rockchip,rk3328-vpu
  21       - rockchip,rk3399-vpu
  22
  23   reg:
  24     maxItems: 1
  25
  26   interrupts:
  27     minItems: 1
  28     maxItems: 2
  29
  30   interrupt-names:
  31     oneOf:
  32       - const: vdpu
  33       - items:
  34           - const: vepu
  35           - const: vdpu
  36
  37   clocks:
  38     maxItems: 2
  39
  40   clock-names:
  41     items:
  42       - const: aclk
  43       - const: hclk
  44
  45   power-domains:
  46     maxItems: 1
  47
  48   iommus:
  49     maxItems: 1
  50
  51 required:
  52   - compatible
  53   - reg
  54   - interrupts
  55   - interrupt-names
  56   - clocks
  57   - clock-names
  58
  59 additionalProperties: false
  60
  61 examples:
  62   - |
  63         #include <dt-bindings/clock/rk3288-cru.h>
  64         #include <dt-bindings/interrupt-controller/arm-gic.h>
  65         #include <dt-bindings/power/rk3288-power.h>
  66
  67         vpu: video-codec@ff9a0000 {
  68                 compatible = "rockchip,rk3288-vpu";
  69                 reg = <0xff9a0000 0x800>;
  70                 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
  71                              <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
  72                 interrupt-names = "vepu", "vdpu";
  73                 clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
  74                 clock-names = "aclk", "hclk";
  75                 power-domains = <&power RK3288_PD_VIDEO>;
  76                 iommus = <&vpu_mmu>;
  77         };