Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/memory-controllers/renesas,rpc-if.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Renesas Reduced Pin Count Interface (RPC-IF)
   8
   9 maintainers:
  10   - Sergei Shtylyov <sergei.shtylyov@gmail.com>
  11
  12 description: |
  13   Renesas RPC-IF allows a SPI flash or HyperFlash connected to the SoC to
  14   be accessed via the external address space read mode or the manual mode.
  15
  16   The flash chip itself should be represented by a subnode of the RPC-IF node.
  17   The flash interface is selected based on the "compatible" property of this
  18   subnode:
  19   - if it contains "jedec,spi-nor", then SPI is used;
  20   - if it contains "cfi-flash", then HyperFlash is used.
  21
  22 allOf:
  23   - $ref: "/schemas/spi/spi-controller.yaml#"
  24
  25 properties:
  26   compatible:
  27     items:
  28       - enum:
  29           - renesas,r8a77970-rpc-if       # R-Car V3M
  30           - renesas,r8a77980-rpc-if       # R-Car V3H
  31           - renesas,r8a77995-rpc-if       # R-Car D3
  32       - const: renesas,rcar-gen3-rpc-if   # a generic R-Car gen3 device
  33
  34   reg:
  35     items:
  36       - description: RPC-IF registers
  37       - description: direct mapping read mode area
  38       - description: write buffer area
  39
  40   reg-names:
  41     items:
  42       - const: regs
  43       - const: dirmap
  44       - const: wbuf
  45
  46   clocks:
  47     maxItems: 1
  48
  49   power-domains:
  50     maxItems: 1
  51
  52   resets:
  53     maxItems: 1
  54
  55 patternProperties:
  56   "flash@[0-9a-f]+$":
  57     type: object
  58     properties:
  59       compatible:
  60         enum:
  61           - cfi-flash
  62           - jedec,spi-nor
  63
  64 unevaluatedProperties: false
  65
  66 examples:
  67   - |
  68     #include <dt-bindings/clock/renesas-cpg-mssr.h>
  69     #include <dt-bindings/power/r8a77995-sysc.h>
  70
  71     spi@ee200000 {
  72       compatible = "renesas,r8a77995-rpc-if", "renesas,rcar-gen3-rpc-if";
  73       reg = <0xee200000 0x200>,
  74             <0x08000000 0x4000000>,
  75             <0xee208000 0x100>;
  76       reg-names = "regs", "dirmap", "wbuf";
  77       clocks = <&cpg CPG_MOD 917>;
  78       power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
  79       resets = <&cpg 917>;
  80       #address-cells = <1>;
  81       #size-cells = <0>;
  82
  83       flash@0 {
  84         compatible = "jedec,spi-nor";
  85         reg = <0>;
  86         spi-max-frequency = <40000000>;
  87         spi-tx-bus-width = <1>;
  88         spi-rx-bus-width = <1>;
  89       };
  90     };