1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/mfd/st,stm32-timers.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 Timers bindings
10 This hardware block provides 3 types of timer along with PWM functionality:
11 - advanced-control timers consist of a 16-bit auto-reload counter driven
12 by a programmable prescaler, break input feature, PWM outputs and
13 complementary PWM outputs channels.
14 - general-purpose timers consist of a 16-bit or 32-bit auto-reload counter
15 driven by a programmable prescaler and PWM outputs.
16 - basic timers consist of a 16-bit auto-reload counter driven by a
17 programmable prescaler.
20 - Benjamin Gaignard <benjamin.gaignard@st.com>
21 - Fabrice Gasnier <fabrice.gasnier@st.com>
25 const: st,stm32-timers
46 enum: [ ch1, ch2, ch3, ch4, up, trig, com ]
68 One or two <index level filter> to describe break input
70 $ref: /schemas/types.yaml#/definitions/uint32-matrix
74 "index" indicates on which break input (0 or 1) the
75 configuration should be applied.
78 "level" gives the active level (0=low or 1=high) of the
79 input signal for this configuration
82 "filter" gives the filtering value (up to 15) to be applied.
98 - st,stm32-timer-trigger
99 - st,stm32h7-timer-trigger
102 description: Identify trigger hardware block.
116 const: st,stm32-timer-counter
129 additionalProperties: false
133 #include <dt-bindings/clock/stm32mp1-clks.h>
134 timers2: timer@40000000 {
135 #address-cells = <1>;
137 compatible = "st,stm32-timers";
138 reg = <0x40000000 0x400>;
139 clocks = <&rcc TIM2_K>;
141 dmas = <&dmamux1 18 0x400 0x1>,
142 <&dmamux1 19 0x400 0x1>,
143 <&dmamux1 20 0x400 0x1>,
144 <&dmamux1 21 0x400 0x1>,
145 <&dmamux1 22 0x400 0x1>;
146 dma-names = "ch1", "ch2", "ch3", "ch4", "up";
148 compatible = "st,stm32-pwm";
150 st,breakinput = <0 1 5>;
153 compatible = "st,stm32-timer-trigger";
157 compatible = "st,stm32-timer-counter";