1 * SPI NOR flash: ST M25Pxx (and similar) serial flash chips
4 - #address-cells, #size-cells : Must be present if the device has sub-nodes
5 representing partitions.
6 - compatible : May include a device-specific string consisting of the
7 manufacturer and name of the chip. A list of supported chip
9 Must also include "jedec,spi-nor" for any SPI NOR flash that can
10 be identified by the JEDEC READ ID opcode (0x9F).
50 The following chip names have been used historically to
51 designate quirky versions of flash chips that do not support the
52 JEDEC READ ID opcode (0x9F):
63 - reg : Chip-Select number
64 - spi-max-frequency : Maximum frequency of the SPI bus the chip can operate at
67 - m25p,fast-read : Use the "fast read" opcode to read data from the chip instead
68 of the usual "read" opcode. This opcode is not supported by
69 all chips and support for it can not be detected at runtime.
70 Refer to your chips' datasheet to check if this is supported
72 - broken-flash-reset : Some flash devices utilize stateful addressing modes
73 (e.g., for 32-bit addressing) which need to be managed
74 carefully by a system. Because these sorts of flash don't
75 have a standardized software reset command, and because some
76 systems don't toggle the flash RESET# pin upon system reset
77 (if the pin even exists at all), there are systems which
78 cannot reboot properly if the flash is left in the "wrong"
79 state. This boolean flag can be used on such systems, to
80 denote the absence of a reliable reset mechanism.
87 compatible = "spansion,m25p80", "jedec,spi-nor";
89 spi-max-frequency = <40000000>;