1 # SPDX-License-Identifier: GPL-2.0
4 $id: http://devicetree.org/schemas/phy/allwinner,sun8i-r40-usb-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner R40 USB PHY Device Tree Bindings
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
18 const: allwinner,sun8i-r40-usb-phy
22 - description: PHY Control registers
23 - description: PHY PMU0 registers
24 - description: PHY PMU1 registers
25 - description: PHY PMU2 registers
36 - description: USB OTG PHY bus clock
37 - description: USB Host 0 PHY bus clock
38 - description: USB Host 1 PHY bus clock
48 - description: USB OTG reset
49 - description: USB Host 1 Controller reset
50 - description: USB Host 2 Controller reset
59 description: GPIO to the USB OTG ID pin
62 description: GPIO to the USB OTG VBUS detect pin
64 usb0_vbus_power-supply:
65 description: Power supply to detect the USB OTG VBUS
68 description: Regulator controlling USB OTG VBUS
71 description: Regulator controlling USB1 Host controller
74 description: Regulator controlling USB2 Host controller
86 additionalProperties: false
90 #include <dt-bindings/gpio/gpio.h>
91 #include <dt-bindings/clock/sun8i-r40-ccu.h>
92 #include <dt-bindings/reset/sun8i-r40-ccu.h>
96 compatible = "allwinner,sun8i-r40-usb-phy";
97 reg = <0x01c13400 0x14>,
101 reg-names = "phy_ctrl",
105 clocks = <&ccu CLK_USB_PHY0>,
108 clock-names = "usb0_phy",
111 resets = <&ccu RST_USB_PHY0>,
114 reset-names = "usb0_reset",
117 usb1_vbus-supply = <®_vcc5v0>;
118 usb2_vbus-supply = <®_vcc5v0>;