WIP FPC-III support
[linux/fpc-iii.git] / Documentation / devicetree / bindings / pinctrl / intel,lgm-io.yaml
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1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/intel,lgm-io.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Intel Lightning Mountain SoC pinmux & GPIO controller binding
9 maintainers:
10   - Rahul Tanwar <rahul.tanwar@linux.intel.com>
12 description: |
13   Pinmux & GPIO controller controls pin multiplexing & configuration including
14   GPIO function selection & GPIO attributes configuration.
16 properties:
17   compatible:
18     const: intel,lgm-io
20   reg:
21     maxItems: 1
23 # Client device subnode's properties
24 patternProperties:
25   '-pins$':
26     type: object
27     description:
28       Pinctrl node's client devices use subnodes for desired pin configuration.
29       Client device subnodes use below standard properties.
30     $ref: pinmux-node.yaml#
32     properties:
33       function: true
34       groups: true
35       pins: true
36       pinmux: true
37       bias-pull-up: true
38       bias-pull-down: true
39       drive-strength: true
40       slew-rate: true
41       drive-open-drain: true
42       output-enable: true
44     required:
45       - function
46       - groups
48     additionalProperties: false
50 required:
51   - compatible
52   - reg
54 additionalProperties: false
56 examples:
57   # Pinmux controller node
58   - |
59     pinctrl: pinctrl@e2880000 {
60         compatible = "intel,lgm-io";
61         reg = <0xe2880000 0x100000>;
63         uart0-pins {
64              pins = <64>, /* UART_RX0 */
65                     <65>; /* UART_TX0 */
66              function = "CONSOLE_UART0";
67              pinmux = <1>,
68                       <1>;
69              groups = "CONSOLE_UART0";
70           };
71     };
73 ...