Documentation/devicetree/bindings/pwm/imx-pwm.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/pwm/imx-pwm.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Freescale i.MX PWM controller
   8
   9 maintainers:
  10   - Philipp Zabel <p.zabel@pengutronix.de>
  11
  12 properties:
  13   "#pwm-cells":
  14     description: |
  15       Should be 2 for i.MX1 and 3 for i.MX27 and newer SoCs. See pwm.yaml
  16       in this directory for a description of the cells format.
  17     enum:
  18       - 2
  19       - 3
  20
  21   compatible:
  22     oneOf:
  23       - enum:
  24           - fsl,imx1-pwm
  25           - fsl,imx27-pwm
  26       - items:
  27           - enum:
  28               - fsl,imx25-pwm
  29               - fsl,imx31-pwm
  30               - fsl,imx50-pwm
  31               - fsl,imx51-pwm
  32               - fsl,imx53-pwm
  33               - fsl,imx6q-pwm
  34               - fsl,imx6sl-pwm
  35               - fsl,imx6sll-pwm
  36               - fsl,imx6sx-pwm
  37               - fsl,imx6ul-pwm
  38               - fsl,imx7d-pwm
  39               - fsl,imx8mm-pwm
  40               - fsl,imx8mn-pwm
  41               - fsl,imx8mp-pwm
  42               - fsl,imx8mq-pwm
  43           - const: fsl,imx27-pwm
  44
  45   reg:
  46     maxItems: 1
  47
  48   clocks:
  49     items:
  50       - description: SoC PWM ipg clock
  51       - description: SoC PWM per clock
  52
  53   clock-names:
  54     items:
  55       - const: ipg
  56       - const: per
  57
  58   interrupts:
  59     maxItems: 1
  60
  61 required:
  62   - "#pwm-cells"
  63   - compatible
  64   - reg
  65   - clocks
  66   - clock-names
  67   - interrupts
  68
  69 additionalProperties: false
  70
  71 examples:
  72   - |
  73     #include <dt-bindings/clock/imx5-clock.h>
  74
  75     pwm@53fb4000 {
  76         #pwm-cells = <3>;
  77         compatible = "fsl,imx27-pwm";
  78         reg = <0x53fb4000 0x4000>;
  79         clocks = <&clks IMX5_CLK_PWM1_IPG_GATE>,
  80                  <&clks IMX5_CLK_PWM1_HF_GATE>;
  81         clock-names = "ipg", "per";
  82         interrupts = <61>;
  83     };