WIP FPC-III support
[linux/fpc-iii.git] / Documentation / devicetree / bindings / pwm / renesas,tpu-pwm.yaml
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1 # SPDX-License-Identifier: GPL-2.0
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/pwm/renesas,tpu-pwm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car Timer Pulse Unit PWM Controller
9 maintainers:
10   - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
12 properties:
13   compatible:
14     items:
15       - enum:
16           - renesas,tpu-r8a73a4   # R-Mobile APE6
17           - renesas,tpu-r8a7740   # R-Mobile A1
18           - renesas,tpu-r8a7742   # RZ/G1H
19           - renesas,tpu-r8a7743   # RZ/G1M
20           - renesas,tpu-r8a7744   # RZ/G1N
21           - renesas,tpu-r8a7745   # RZ/G1E
22           - renesas,tpu-r8a7790   # R-Car H2
23           - renesas,tpu-r8a7791   # R-Car M2-W
24           - renesas,tpu-r8a7792   # R-Car V2H
25           - renesas,tpu-r8a7793   # R-Car M2-N
26           - renesas,tpu-r8a7794   # R-Car E2
27           - renesas,tpu-r8a7795   # R-Car H3
28           - renesas,tpu-r8a7796   # R-Car M3-W
29           - renesas,tpu-r8a77965  # R-Car M3-N
30           - renesas,tpu-r8a77970  # R-Car V3M
31           - renesas,tpu-r8a77980  # R-Car V3H
32       - const: renesas,tpu
34   reg:
35     # Base address and length of each memory resource used by the PWM
36     # controller hardware module.
37     maxItems: 1
39   interrupts:
40     maxItems: 1
42   '#pwm-cells':
43     # should be 3. See pwm.yaml in this directory for a description of
44     # the cells format. The only third cell flag supported by this binding is
45     # PWM_POLARITY_INVERTED.
46     const: 3
48   clocks:
49     maxItems: 1
51   power-domains:
52     maxItems: 1
54   resets:
55     maxItems: 1
57 required:
58   - compatible
59   - reg
60   - '#pwm-cells'
62 additionalProperties: false
64 examples:
65   - |
66     #include <dt-bindings/clock/r8a7740-clock.h>
68     tpu: pwm@e6600000 {
69         compatible = "renesas,tpu-r8a7740", "renesas,tpu";
70         reg = <0xe6600000 0x148>;
71         clocks = <&mstp3_clks R8A7740_CLK_TPU0>;
72         power-domains = <&pd_a3sp>;
73         #pwm-cells = <3>;
74     };