1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: "http://devicetree.org/schemas/serial/renesas,hscif.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
7 title: Renesas High Speed Serial Communication Interface with FIFO (HSCIF)
10 - Geert Uytterhoeven <geert+renesas@glider.be>
20 - renesas,hscif-r8a7778 # R-Car M1
21 - renesas,hscif-r8a7779 # R-Car H1
22 - const: renesas,rcar-gen1-hscif # R-Car Gen1
23 - const: renesas,hscif # generic HSCIF compatible UART
27 - renesas,hscif-r8a7742 # RZ/G1H
28 - renesas,hscif-r8a7743 # RZ/G1M
29 - renesas,hscif-r8a7744 # RZ/G1N
30 - renesas,hscif-r8a7745 # RZ/G1E
31 - renesas,hscif-r8a77470 # RZ/G1C
32 - renesas,hscif-r8a7790 # R-Car H2
33 - renesas,hscif-r8a7791 # R-Car M2-W
34 - renesas,hscif-r8a7792 # R-Car V2H
35 - renesas,hscif-r8a7793 # R-Car M2-N
36 - renesas,hscif-r8a7794 # R-Car E2
37 - const: renesas,rcar-gen2-hscif # R-Car Gen2 and RZ/G1
38 - const: renesas,hscif # generic HSCIF compatible UART
42 - renesas,hscif-r8a774a1 # RZ/G2M
43 - renesas,hscif-r8a774b1 # RZ/G2N
44 - renesas,hscif-r8a774c0 # RZ/G2E
45 - renesas,hscif-r8a774e1 # RZ/G2H
46 - renesas,hscif-r8a7795 # R-Car H3
47 - renesas,hscif-r8a7796 # R-Car M3-W
48 - renesas,hscif-r8a77961 # R-Car M3-W+
49 - renesas,hscif-r8a77965 # R-Car M3-N
50 - renesas,hscif-r8a77970 # R-Car V3M
51 - renesas,hscif-r8a77980 # R-Car V3H
52 - renesas,hscif-r8a77990 # R-Car E3
53 - renesas,hscif-r8a77995 # R-Car D3
54 - const: renesas,rcar-gen3-hscif # R-Car Gen3 and RZ/G2
55 - const: renesas,hscif # generic HSCIF compatible UART
72 - fck # UART functional clock
73 - hsck # optional external clock input
74 - brg_int # optional internal clock source for BRG frequency divider
75 - scif_clk # optional external clock source for BRG frequency divider
85 Must contain a list of pairs of references to DMA specifiers, one for
86 transmission, and one for reception.
104 unevaluatedProperties: false
111 - renesas,rcar-gen2-hscif
112 - renesas,rcar-gen3-hscif
119 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
120 #include <dt-bindings/interrupt-controller/arm-gic.h>
121 #include <dt-bindings/power/r8a7795-sysc.h>
126 hscif1: serial@e6550000 {
127 compatible = "renesas,hscif-r8a7795", "renesas,rcar-gen3-hscif",
129 reg = <0xe6550000 96>;
130 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
131 clocks = <&cpg CPG_MOD 519>, <&cpg CPG_CORE R8A7795_CLK_S3D1>,
133 clock-names = "fck", "brg_int", "scif_clk";
134 dmas = <&dmac1 0x33>, <&dmac1 0x32>, <&dmac2 0x33>, <&dmac2 0x32>;
135 dma-names = "tx", "rx", "tx", "rx";
136 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;