Documentation/devicetree/bindings/soc/fsl/bman-portals.txt

   1 QorIQ DPAA Buffer Manager Portals Device Tree Binding
   2
   3 Copyright (C) 2008 - 2014 Freescale Semiconductor Inc.
   4
   5 CONTENTS
   6
   7         - BMan Portal
   8         - Example
   9
  10 BMan Portal Node
  11
  12 Portals are memory mapped interfaces to BMan that allow low-latency, lock-less
  13 interaction by software running on processor cores, accelerators and network
  14 interfaces with the BMan
  15
  16 PROPERTIES
  17
  18 - compatible
  19         Usage:          Required
  20         Value type:     <stringlist>
  21         Definition:     Must include "fsl,bman-portal-<hardware revision>"
  22                         May include "fsl,<SoC>-bman-portal" or "fsl,bman-portal"
  23
  24 - reg
  25         Usage:          Required
  26         Value type:     <prop-encoded-array>
  27         Definition:     Two regions. The first is the cache-enabled region of
  28                         the portal. The second is the cache-inhibited region of
  29                         the portal
  30
  31 - interrupts
  32         Usage:          Required
  33         Value type:     <prop-encoded-array>
  34         Definition:     Standard property
  35
  36 EXAMPLE
  37
  38 The example below shows a (P4080) BMan portals container/bus node with two portals
  39
  40         bman-portals@ff4000000 {
  41                 #address-cells = <1>;
  42                 #size-cells = <1>;
  43                 compatible = "simple-bus";
  44                 ranges = <0 0xf 0xf4000000 0x200000>;
  45
  46                 bman-portal@0 {
  47                         compatible = "fsl,bman-portal-1.0.0", "fsl,bman-portal";
  48                         reg = <0x0 0x4000>, <0x100000 0x1000>;
  49                         interrupts = <105 2 0 0>;
  50                 };
  51                 bman-portal@4000 {
  52                         compatible = "fsl,bman-portal-1.0.0", "fsl,bman-portal";
  53                         reg = <0x4000 0x4000>, <0x101000 0x1000>;
  54                         interrupts = <107 2 0 0>;
  55                 };
  56         };