Documentation/devicetree/bindings/soc/microchip/atmel,at91rm9200-tcb.yaml

   1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: "http://devicetree.org/schemas/soc/microchip/atmel,at91rm9200-tcb.yaml#"
   5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
   6
   7 title: Atmel Timer Counter Block
   8
   9 maintainers:
  10   - Alexandre Belloni <alexandre.belloni@bootlin.com>
  11
  12 description: |
  13   The Atmel (now Microchip) SoCs have timers named Timer Counter Block. Each
  14   timer has three channels with two counters each.
  15
  16 properties:
  17   compatible:
  18     items:
  19       - enum:
  20           - atmel,at91rm9200-tcb
  21           - atmel,at91sam9x5-tcb
  22           - atmel,sama5d2-tcb
  23       - const: simple-mfd
  24       - const: syscon
  25
  26   reg:
  27     maxItems: 1
  28
  29   interrupts:
  30     description:
  31       List of interrupts. One interrupt per TCB channel if available or one
  32       interrupt for the TC block
  33     minItems: 1
  34     maxItems: 3
  35
  36   clock-names:
  37     description:
  38       List of clock names. Always includes t0_clk and slow clk. Also includes
  39       t1_clk and t2_clk if a clock per channel is available.
  40     minItems: 2
  41     maxItems: 4
  42
  43   clocks:
  44     minItems: 2
  45     maxItems: 4
  46
  47   '#address-cells':
  48     const: 1
  49
  50   '#size-cells':
  51     const: 0
  52
  53 patternProperties:
  54   "^timer@[0-2]$":
  55     description: The timer block channels that are used as timers or counters.
  56     type: object
  57     properties:
  58       compatible:
  59         items:
  60           - enum:
  61               - atmel,tcb-timer
  62               - atmel,tcb-pwm
  63               - microchip,tcb-capture
  64       reg:
  65         description:
  66           List of channels to use for this particular timer. In Microchip TCB capture
  67           mode channels are registered as a counter devices, for the qdec mode TCB0's
  68           channel <0> and <1> are required.
  69
  70         minItems: 1
  71         maxItems: 3
  72     required:
  73       - compatible
  74       - reg
  75
  76   "^pwm@[0-2]$":
  77     description: The timer block channels that are used as PWMs.
  78     $ref: ../../pwm/pwm.yaml#
  79     type: object
  80     properties:
  81       compatible:
  82         const: atmel,tcb-pwm
  83       reg:
  84         description:
  85           TCB channel to use for this PWM.
  86         enum: [ 0, 1, 2 ]
  87
  88       "#pwm-cells":
  89         description:
  90           The only third cell flag supported by this binding is
  91           PWM_POLARITY_INVERTED.
  92         const: 3
  93
  94     required:
  95       - compatible
  96       - reg
  97       - "#pwm-cells"
  98
  99     additionalProperties: false
 100
 101
 102 allOf:
 103   - if:
 104       properties:
 105         compatible:
 106           contains:
 107             const: atmel,sama5d2-tcb
 108     then:
 109       properties:
 110         clocks:
 111           minItems: 3
 112           maxItems: 3
 113         clock-names:
 114           items:
 115             - const: t0_clk
 116             - const: gclk
 117             - const: slow_clk
 118     else:
 119       properties:
 120         clocks:
 121           minItems: 2
 122           maxItems: 4
 123         clock-names:
 124           oneOf:
 125             - items:
 126                 - const: t0_clk
 127                 - const: slow_clk
 128             - items:
 129                 - const: t0_clk
 130                 - const: t1_clk
 131                 - const: t2_clk
 132                 - const: slow_clk
 133
 134 required:
 135   - compatible
 136   - reg
 137   - interrupts
 138   - clocks
 139   - clock-names
 140   - '#address-cells'
 141   - '#size-cells'
 142
 143 additionalProperties: false
 144
 145 examples:
 146   - |
 147     /* One interrupt per TC block: */
 148         tcb0: timer@fff7c000 {
 149                 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
 150                 #address-cells = <1>;
 151                 #size-cells = <0>;
 152                 reg = <0xfff7c000 0x100>;
 153                 interrupts = <18 4>;
 154                 clocks = <&tcb0_clk>, <&clk32k>;
 155                 clock-names = "t0_clk", "slow_clk";
 156
 157                 timer@0 {
 158                         compatible = "atmel,tcb-timer";
 159                         reg = <0>, <1>;
 160                 };
 161
 162                 timer@2 {
 163                         compatible = "atmel,tcb-timer";
 164                         reg = <2>;
 165                 };
 166         };
 167
 168     /* One interrupt per TC channel in a TC block: */
 169         tcb1: timer@fffdc000 {
 170                 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
 171                 #address-cells = <1>;
 172                 #size-cells = <0>;
 173                 reg = <0xfffdc000 0x100>;
 174                 interrupts = <26 4>, <27 4>, <28 4>;
 175                 clocks = <&tcb1_clk>, <&clk32k>;
 176                 clock-names = "t0_clk", "slow_clk";
 177
 178                 timer@0 {
 179                         compatible = "atmel,tcb-timer";
 180                         reg = <0>;
 181                 };
 182
 183                 timer@1 {
 184                         compatible = "atmel,tcb-timer";
 185                         reg = <1>;
 186                 };
 187
 188                 pwm@2 {
 189                         compatible = "atmel,tcb-pwm";
 190                         reg = <2>;
 191                         #pwm-cells = <3>;
 192                 };
 193          };
 194     /* TCB0 Capture with QDEC: */
 195         timer@f800c000 {
 196                 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
 197                 #address-cells = <1>;
 198                 #size-cells = <0>;
 199                 reg = <0xfff7c000 0x100>;
 200                 interrupts = <18 4>;
 201                 clocks = <&tcb0_clk>, <&clk32k>;
 202                 clock-names = "t0_clk", "slow_clk";
 203
 204                 timer@0 {
 205                         compatible = "microchip,tcb-capture";
 206                         reg = <0>, <1>;
 207                 };
 208
 209                 timer@2 {
 210                         compatible = "atmel,tcb-timer";
 211                         reg = <2>;
 212                 };
 213         };