1 # SPDX-License-Identifier: GPL-2.0-only
4 $id: http://devicetree.org/schemas/spi/snps,dw-apb-ssi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys DesignWare AMBA 2.0 Synchronous Serial Interface
10 - Mark Brown <broonie@kernel.org>
13 - $ref: "spi-controller.yaml#"
44 - description: Generic DW SPI Controller
48 - description: Microsemi Ocelot/Jaguar2 SoC SPI Controller
53 - const: snps,dw-apb-ssi
54 - description: Microchip Sparx5 SoC SPI Controller
55 const: microchip,sparx5-spi
56 - description: Amazon Alpine SPI Controller
57 const: amazon,alpine-dw-apb-ssi
58 - description: Renesas RZ/N1 SPI Controller
60 - const: renesas,rzn1-spi
61 - const: snps,dw-apb-ssi
62 - description: Intel Keem Bay SPI Controller
63 const: intel,keembay-ssi
64 - description: Baikal-T1 SPI Controller
66 - description: Baikal-T1 System Boot SPI Controller
67 const: baikal,bt1-sys-ssi
68 - description: Canaan Kendryte K210 SoS SPI Controller
69 const: canaan,k210-spi
74 - description: DW APB SSI controller memory mapped registers
75 - description: SPI MST region map or directly mapped SPI ROM
83 - description: SPI Controller reference clock source
84 - description: APB interface clock source
99 $ref: /schemas/types.yaml#/definitions/uint32
100 description: I/O register width (in bytes) implemented by this device
111 - description: TX DMA Channel
112 - description: RX DMA Channel
121 description: Default value of the rx-sample-delay-ns property.
122 This value will be used if the property is not explicitly defined
123 for a SPI slave device. See below.
140 description: SPI Rx sample delay offset, unit is nanoseconds.
141 The delay from the default sample time before the actual
142 sample of the rxd input signal occurs. The "rx_sample_delay"
143 is an optional feature of the designware controller, and the
144 upper limit is also subject to controller configuration.
146 unevaluatedProperties: false
158 compatible = "snps,dw-apb-ssi";
159 reg = <0xfff00000 0x1000>;
160 #address-cells = <1>;
162 interrupts = <0 154 4>;
163 clocks = <&spi_m_clk>;
165 cs-gpios = <&gpio0 13 0>,
167 rx-sample-delay-ns = <3>;
169 compatible = "spi-nand";
171 rx-sample-delay-ns = <7>;
176 compatible = "baikal,bt1-sys-ssi";
177 reg = <0x1f040100 0x900>,
178 <0x1c000000 0x1000000>;
179 #address-cells = <1>;
181 mux-controls = <&boot_mux>;
183 clock-names = "ssi_clk";