WIP FPC-III support
[linux/fpc-iii.git] / Documentation / devicetree / bindings / spi / spi-fsl-lpspi.yaml
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1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-fsl-lpspi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale Low Power SPI (LPSPI) for i.MX
9 maintainers:
10   - Anson Huang <Anson.Huang@nxp.com>
12 allOf:
13   - $ref: "/schemas/spi/spi-controller.yaml#"
15 properties:
16   compatible:
17     enum:
18       - fsl,imx7ulp-spi
19       - fsl,imx8qxp-spi
21   reg:
22     maxItems: 1
24   interrupts:
25     maxItems: 1
27   clocks:
28     items:
29       - description: SoC SPI per clock
30       - description: SoC SPI ipg clock
32   clock-names:
33     items:
34       - const: per
35       - const: ipg
37   fsl,spi-only-use-cs1-sel:
38     description:
39       spi common code does not support use of CS signals discontinuously.
40       i.MX8DXL-EVK board only uses CS1 without using CS0. Therefore, add
41       this property to re-config the chipselect value in the LPSPI driver.
42     type: boolean
44 required:
45   - compatible
46   - reg
47   - interrupts
48   - clocks
49   - clock-names
51 unevaluatedProperties: false
53 examples:
54   - |
55     #include <dt-bindings/clock/imx7ulp-clock.h>
56     #include <dt-bindings/interrupt-controller/arm-gic.h>
58     spi@40290000 {
59         compatible = "fsl,imx7ulp-spi";
60         reg = <0x40290000 0x10000>;
61         interrupt-parent = <&intc>;
62         interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
63         clocks = <&clks IMX7ULP_CLK_LPSPI2>,
64                  <&clks IMX7ULP_CLK_DUMMY>;
65         clock-names = "per", "ipg";
66         spi-slave;
67         fsl,spi-only-use-cs1-sel;
68     };