1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/spi/st,stm32-qspi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 Quad Serial Peripheral Interface (QSPI) bindings
10 - Christophe Kerello <christophe.kerello@st.com>
11 - Patrice Chotard <patrice.chotard@st.com>
14 - $ref: "spi-controller.yaml#"
18 const: st,stm32f469-qspi
22 - description: registers
23 - description: memory mapping
41 - description: tx DMA channel
42 - description: rx DMA channel
56 unevaluatedProperties: false
60 #include <dt-bindings/interrupt-controller/arm-gic.h>
61 #include <dt-bindings/clock/stm32mp1-clks.h>
62 #include <dt-bindings/reset/stm32mp1-resets.h>
64 compatible = "st,stm32f469-qspi";
65 reg = <0x58003000 0x1000>, <0x70000000 0x10000000>;
66 reg-names = "qspi", "qspi_mm";
67 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
68 dmas = <&mdma1 22 0x10 0x100002 0x0 0x0>,
69 <&mdma1 22 0x10 0x100008 0x0 0x0>;
70 dma-names = "tx", "rx";
71 clocks = <&rcc QSPI_K>;
72 resets = <&rcc QSPI_R>;
78 compatible = "jedec,spi-nor";
80 spi-rx-bus-width = <4>;
81 spi-max-frequency = <108000000>;