1 * Cadence Universal Flash Storage (UFS) Controller
3 UFS nodes are defined to describe on-chip UFS host controllers.
4 Each UFS controller instance should have its own node.
5 Please see the ufshcd-pltfrm.txt for a list of all available properties.
8 - compatible : Compatible list, contains one of the following controllers:
9 "cdns,ufshc" - Generic CDNS HCI,
10 "cdns,ufshc-m31-16nm" - CDNS UFS HC + M31 16nm PHY
11 complemented with the JEDEC version:
14 - reg : Address and length of the UFS register set.
15 - interrupts : One interrupt mapping.
16 - freq-table-hz : Clock frequency table.
17 See the ufshcd-pltfrm.txt for details.
18 - clocks : List of phandle and clock specifier pairs.
19 - clock-names : List of clock input name strings sorted in the same
20 order as the clocks property. "core_clk" is mandatory.
21 Depending on a type of a PHY,
22 the "phy_clk" clock can also be added, if needed.
26 compatible = "cdns,ufshc", "jedec,ufs-2.0";
27 reg = <0xfd030000 0x10000>;
28 interrupts = <0 1 IRQ_TYPE_LEVEL_HIGH>;
29 freq-table-hz = <0 0>, <0 0>;
30 clocks = <&ufs_core_clk>, <&ufs_phy_clk>;
31 clock-names = "core_clk", "phy_clk";