1 MediaTek musb DRD/OTG controller
2 -------------------------------------------
5 - compatible : should be one of:
8 followed by "mediatek,mtk-musb"
9 - reg : specifies physical base address and size of
11 - interrupts : interrupt used by musb controller
12 - interrupt-names : must be "mc"
13 - phys : PHY specifier for the OTG phy
14 - dr_mode : should be one of "host", "peripheral" or "otg",
15 refer to usb/generic.txt
16 - clocks : a list of phandle + clock-specifier pairs, one for
17 each entry in clock-names
18 - clock-names : must contain "main", "mcu", "univpll"
19 for clocks of controller
22 - power-domains : a phandle to USB power domain node to control USB's
26 usb connector node as defined in bindings/connector/usb-connector.yaml
28 - id-gpios : input GPIO for USB ID pin.
29 - vbus-gpios : input GPIO for USB VBUS pin.
30 - vbus-supply : reference to the VBUS regulator, needed when supports
32 - usb-role-switch : use USB Role Switch to support dual-role switch, see
38 compatible = "mediatek,mt2701-musb",
40 reg = <0 0x11200000 0 0x1000>;
41 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>;
42 interrupt-names = "mc";
43 phys = <&u2port2 PHY_TYPE_USB2>;
45 clocks = <&pericfg CLK_PERI_USB0>,
46 <&pericfg CLK_PERI_USB0_MCU>,
47 <&pericfg CLK_PERI_USB_SLV>;
48 clock-names = "main","mcu","univpll";
49 power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>;
52 compatible = "gpio-usb-b-connector", "usb-b-connector";
54 id-gpios = <&pio 44 GPIO_ACTIVE_HIGH>;
55 vbus-supply = <&usb_vbus>;