4 - compatible: must be one of:
9 - reg: physical base address of the controller and length of memory mapped
14 - aspeed,reset-type = "cpu|soc|system|none"
16 Reset behavior - Whenever a timeout occurs the watchdog can be programmed
17 to generate one of three different, mutually exclusive, types of resets.
19 Type "none" can be specified to indicate that no resets are to be done.
20 This is useful in situations where another watchdog engine on chip is
23 If 'aspeed,reset-type=' is not specified the default is to enable system
28 - cpu: Reset CPU on watchdog timeout
30 - soc: Reset 'System on Chip' on watchdog timeout
32 - system: Reset system on watchdog timeout
34 - none: No reset is performed on timeout. Assumes another watchdog
35 engine is responsible for this.
37 - aspeed,alt-boot: If property is present then boot from alternate block.
38 - aspeed,external-signal: If property is present then signal is sent to
39 external reset counter (only WDT1 and WDT2). If not
40 specified no external signal is sent.
41 - aspeed,ext-pulse-duration: External signal pulse duration in microseconds
43 Optional properties for AST2500-compatible watchdogs:
44 - aspeed,ext-push-pull: If aspeed,external-signal is present, set the pin's
45 drive type to push-pull. The default is open-drain.
46 - aspeed,ext-active-high: If aspeed,external-signal is present and and the pin
47 is configured as push-pull, then set the pulse
48 polarity to active-high. The default is active-low.
52 wdt1: watchdog@1e785000 {
53 compatible = "aspeed,ast2400-wdt";
54 reg = <0x1e785000 0x1c>;
55 aspeed,reset-type = "system";
56 aspeed,external-signal;