1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
5 * Joern Rennecke <joern.rennecke@embecosm.com>: Jan 2012
6 * -Insn Scheduling improvements to csum core routines.
7 * = csum_fold( ) largely derived from ARM version.
8 * = ip_fast_cum( ) to have module scheduling
9 * -gcc 4.4.x broke networking. Alias analysis needed to be primed.
10 * worked around by adding memory clobber to ip_fast_csum( )
13 * -Rewrote ip_fast_cscum( ) and csum_fold( ) with fast inline asm
16 #ifndef _ASM_ARC_CHECKSUM_H
17 #define _ASM_ARC_CHECKSUM_H
20 * Fold a partial checksum
22 * The 2 swords comprising the 32bit sum are added, any carry to 16th bit
23 * added back and final sword result inverted.
25 static inline __sum16
csum_fold(__wsum s
)
27 unsigned r
= s
<< 16 | s
>> 16; /* ror */
34 * This is a version of ip_compute_csum() optimized for IP headers,
35 * which always checksum on 4 octet boundaries.
38 ip_fast_csum(const void *iph
, unsigned int ihl
)
40 const void *ptr
= iph
;
41 unsigned int tmp
, tmp2
, sum
;
44 " ld.ab %0, [%3, 4] \n"
45 " ld.ab %2, [%3, 4] \n"
47 " lsr.f lp_count, %1, 1 \n"
49 " add.f %0, %0, %2 \n"
50 " ld.ab %2, [%3, 4] \n"
52 " ld.ab %1, [%3, 4] \n"
53 " adc.f %0, %0, %2 \n"
54 " ld.ab %2, [%3, 4] \n"
55 " adc.f %0, %0, %1 \n"
56 "1: adc.f %0, %0, %2 \n"
58 : "=&r"(sum
), "=r"(tmp
), "=&r"(tmp2
), "+&r" (ptr
)
60 : "cc", "lp_count", "memory");
62 return csum_fold(sum
);
66 * TCP pseudo Header is 12 bytes:
67 * SA [4], DA [4], zeroes [1], Proto[1], TCP Seg(hdr+data) Len [2]
70 csum_tcpudp_nofold(__be32 saddr
, __be32 daddr
, __u32 len
,
71 __u8 proto
, __wsum sum
)
74 " add.f %0, %0, %1 \n"
75 " adc.f %0, %0, %2 \n"
76 " adc.f %0, %0, %3 \n"
77 " adc.f %0, %0, %4 \n"
80 : "r"(saddr
), "r"(daddr
),
81 #ifdef CONFIG_CPU_BIG_ENDIAN
92 #define csum_fold csum_fold
93 #define ip_fast_csum ip_fast_csum
94 #define csum_tcpudp_nofold csum_tcpudp_nofold
96 #include <asm-generic/checksum.h>
98 #endif /* _ASM_ARC_CHECKSUM_H */