arch/arc/kernel/smp.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
   4  *
   5  * RajeshwarR: Dec 11, 2007
   6  *   -- Added support for Inter Processor Interrupts
   7  *
   8  * Vineetg: Nov 1st, 2007
   9  *    -- Initial Write (Borrowed heavily from ARM)
  10  */
  11
  12 #include <linux/spinlock.h>
  13 #include <linux/sched/mm.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/profile.h>
  16 #include <linux/mm.h>
  17 #include <linux/cpu.h>
  18 #include <linux/irq.h>
  19 #include <linux/atomic.h>
  20 #include <linux/cpumask.h>
  21 #include <linux/reboot.h>
  22 #include <linux/irqdomain.h>
  23 #include <linux/export.h>
  24 #include <linux/of_fdt.h>
  25
  26 #include <asm/processor.h>
  27 #include <asm/setup.h>
  28 #include <asm/mach_desc.h>
  29
  30 #ifndef CONFIG_ARC_HAS_LLSC
  31 arch_spinlock_t smp_atomic_ops_lock = __ARCH_SPIN_LOCK_UNLOCKED;
  32 arch_spinlock_t smp_bitops_lock = __ARCH_SPIN_LOCK_UNLOCKED;
  33
  34 EXPORT_SYMBOL_GPL(smp_atomic_ops_lock);
  35 EXPORT_SYMBOL_GPL(smp_bitops_lock);
  36 #endif
  37
  38 struct plat_smp_ops  __weak plat_smp_ops;
  39
  40 /* XXX: per cpu ? Only needed once in early seconday boot */
  41 struct task_struct *secondary_idle_tsk;
  42
  43 /* Called from start_kernel */
  44 void __init smp_prepare_boot_cpu(void)
  45 {
  46 }
  47
  48 static int __init arc_get_cpu_map(const char *name, struct cpumask *cpumask)
  49 {
  50         unsigned long dt_root = of_get_flat_dt_root();
  51         const char *buf;
  52
  53         buf = of_get_flat_dt_prop(dt_root, name, NULL);
  54         if (!buf)
  55                 return -EINVAL;
  56
  57         if (cpulist_parse(buf, cpumask))
  58                 return -EINVAL;
  59
  60         return 0;
  61 }
  62
  63 /*
  64  * Read from DeviceTree and setup cpu possible mask. If there is no
  65  * "possible-cpus" property in DeviceTree pretend all [0..NR_CPUS-1] exist.
  66  */
  67 static void __init arc_init_cpu_possible(void)
  68 {
  69         struct cpumask cpumask;
  70
  71         if (arc_get_cpu_map("possible-cpus", &cpumask)) {
  72                 pr_warn("Failed to get possible-cpus from dtb, pretending all %u cpus exist\n",
  73                         NR_CPUS);
  74
  75                 cpumask_setall(&cpumask);
  76         }
  77
  78         if (!cpumask_test_cpu(0, &cpumask))
  79                 panic("Master cpu (cpu[0]) is missed in cpu possible mask!");
  80
  81         init_cpu_possible(&cpumask);
  82 }
  83
  84 /*
  85  * Called from setup_arch() before calling setup_processor()
  86  *
  87  * - Initialise the CPU possible map early - this describes the CPUs
  88  *   which may be present or become present in the system.
  89  * - Call early smp init hook. This can initialize a specific multi-core
  90  *   IP which is say common to several platforms (hence not part of
  91  *   platform specific int_early() hook)
  92  */
  93 void __init smp_init_cpus(void)
  94 {
  95         arc_init_cpu_possible();
  96
  97         if (plat_smp_ops.init_early_smp)
  98                 plat_smp_ops.init_early_smp();
  99 }
 100
 101 /* called from init ( ) =>  process 1 */
 102 void __init smp_prepare_cpus(unsigned int max_cpus)
 103 {
 104         /*
 105          * if platform didn't set the present map already, do it now
 106          * boot cpu is set to present already by init/main.c
 107          */
 108         if (num_present_cpus() <= 1)
 109                 init_cpu_present(cpu_possible_mask);
 110 }
 111
 112 void __init smp_cpus_done(unsigned int max_cpus)
 113 {
 114
 115 }
 116
 117 /*
 118  * Default smp boot helper for Run-on-reset case where all cores start off
 119  * together. Non-masters need to wait for Master to start running.
 120  * This is implemented using a flag in memory, which Non-masters spin-wait on.
 121  * Master sets it to cpu-id of core to "ungate" it.
 122  */
 123 static volatile int wake_flag;
 124
 125 #ifdef CONFIG_ISA_ARCOMPACT
 126
 127 #define __boot_read(f)          f
 128 #define __boot_write(f, v)      f = v
 129
 130 #else
 131
 132 #define __boot_read(f)          arc_read_uncached_32(&f)
 133 #define __boot_write(f, v)      arc_write_uncached_32(&f, v)
 134
 135 #endif
 136
 137 static void arc_default_smp_cpu_kick(int cpu, unsigned long pc)
 138 {
 139         BUG_ON(cpu == 0);
 140
 141         __boot_write(wake_flag, cpu);
 142 }
 143
 144 void arc_platform_smp_wait_to_boot(int cpu)
 145 {
 146         /* for halt-on-reset, we've waited already */
 147         if (IS_ENABLED(CONFIG_ARC_SMP_HALT_ON_RESET))
 148                 return;
 149
 150         while (__boot_read(wake_flag) != cpu)
 151                 ;
 152
 153         __boot_write(wake_flag, 0);
 154 }
 155
 156 const char *arc_platform_smp_cpuinfo(void)
 157 {
 158         return plat_smp_ops.info ? : "";
 159 }
 160
 161 /*
 162  * The very first "C" code executed by secondary
 163  * Called from asm stub in head.S
 164  * "current"/R25 already setup by low level boot code
 165  */
 166 void start_kernel_secondary(void)
 167 {
 168         struct mm_struct *mm = &init_mm;
 169         unsigned int cpu = smp_processor_id();
 170
 171         /* MMU, Caches, Vector Table, Interrupts etc */
 172         setup_processor();
 173
 174         mmget(mm);
 175         mmgrab(mm);
 176         current->active_mm = mm;
 177         cpumask_set_cpu(cpu, mm_cpumask(mm));
 178
 179         /* Some SMP H/w setup - for each cpu */
 180         if (plat_smp_ops.init_per_cpu)
 181                 plat_smp_ops.init_per_cpu(cpu);
 182
 183         if (machine_desc->init_per_cpu)
 184                 machine_desc->init_per_cpu(cpu);
 185
 186         notify_cpu_starting(cpu);
 187         set_cpu_online(cpu, true);
 188
 189         pr_info("## CPU%u LIVE ##: Executing Code...\n", cpu);
 190
 191         local_irq_enable();
 192         preempt_disable();
 193         cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
 194 }
 195
 196 /*
 197  * Called from kernel_init( ) -> smp_init( ) - for each CPU
 198  *
 199  * At this point, Secondary Processor  is "HALT"ed:
 200  *  -It booted, but was halted in head.S
 201  *  -It was configured to halt-on-reset
 202  *  So need to wake it up.
 203  *
 204  * Essential requirements being where to run from (PC) and stack (SP)
 205 */
 206 int __cpu_up(unsigned int cpu, struct task_struct *idle)
 207 {
 208         unsigned long wait_till;
 209
 210         secondary_idle_tsk = idle;
 211
 212         pr_info("Idle Task [%d] %p", cpu, idle);
 213         pr_info("Trying to bring up CPU%u ...\n", cpu);
 214
 215         if (plat_smp_ops.cpu_kick)
 216                 plat_smp_ops.cpu_kick(cpu,
 217                                 (unsigned long)first_lines_of_secondary);
 218         else
 219                 arc_default_smp_cpu_kick(cpu, (unsigned long)NULL);
 220
 221         /* wait for 1 sec after kicking the secondary */
 222         wait_till = jiffies + HZ;
 223         while (time_before(jiffies, wait_till)) {
 224                 if (cpu_online(cpu))
 225                         break;
 226         }
 227
 228         if (!cpu_online(cpu)) {
 229                 pr_info("Timeout: CPU%u FAILED to come up !!!\n", cpu);
 230                 return -1;
 231         }
 232
 233         secondary_idle_tsk = NULL;
 234
 235         return 0;
 236 }
 237
 238 /*
 239  * not supported here
 240  */
 241 int setup_profiling_timer(unsigned int multiplier)
 242 {
 243         return -EINVAL;
 244 }
 245
 246 /*****************************************************************************/
 247 /*              Inter Processor Interrupt Handling                           */
 248 /*****************************************************************************/
 249
 250 enum ipi_msg_type {
 251         IPI_EMPTY = 0,
 252         IPI_RESCHEDULE = 1,
 253         IPI_CALL_FUNC,
 254         IPI_CPU_STOP,
 255 };
 256
 257 /*
 258  * In arches with IRQ for each msg type (above), receiver can use IRQ-id  to
 259  * figure out what msg was sent. For those which don't (ARC has dedicated IPI
 260  * IRQ), the msg-type needs to be conveyed via per-cpu data
 261  */
 262
 263 static DEFINE_PER_CPU(unsigned long, ipi_data);
 264
 265 static void ipi_send_msg_one(int cpu, enum ipi_msg_type msg)
 266 {
 267         unsigned long __percpu *ipi_data_ptr = per_cpu_ptr(&ipi_data, cpu);
 268         unsigned long old, new;
 269         unsigned long flags;
 270
 271         pr_debug("%d Sending msg [%d] to %d\n", smp_processor_id(), msg, cpu);
 272
 273         local_irq_save(flags);
 274
 275         /*
 276          * Atomically write new msg bit (in case others are writing too),
 277          * and read back old value
 278          */
 279         do {
 280                 new = old = READ_ONCE(*ipi_data_ptr);
 281                 new |= 1U << msg;
 282         } while (cmpxchg(ipi_data_ptr, old, new) != old);
 283
 284         /*
 285          * Call the platform specific IPI kick function, but avoid if possible:
 286          * Only do so if there's no pending msg from other concurrent sender(s).
 287          * Otherwise, recevier will see this msg as well when it takes the
 288          * IPI corresponding to that msg. This is true, even if it is already in
 289          * IPI handler, because !@old means it has not yet dequeued the msg(s)
 290          * so @new msg can be a free-loader
 291          */
 292         if (plat_smp_ops.ipi_send && !old)
 293                 plat_smp_ops.ipi_send(cpu);
 294
 295         local_irq_restore(flags);
 296 }
 297
 298 static void ipi_send_msg(const struct cpumask *callmap, enum ipi_msg_type msg)
 299 {
 300         unsigned int cpu;
 301
 302         for_each_cpu(cpu, callmap)
 303                 ipi_send_msg_one(cpu, msg);
 304 }
 305
 306 void smp_send_reschedule(int cpu)
 307 {
 308         ipi_send_msg_one(cpu, IPI_RESCHEDULE);
 309 }
 310
 311 void smp_send_stop(void)
 312 {
 313         struct cpumask targets;
 314         cpumask_copy(&targets, cpu_online_mask);
 315         cpumask_clear_cpu(smp_processor_id(), &targets);
 316         ipi_send_msg(&targets, IPI_CPU_STOP);
 317 }
 318
 319 void arch_send_call_function_single_ipi(int cpu)
 320 {
 321         ipi_send_msg_one(cpu, IPI_CALL_FUNC);
 322 }
 323
 324 void arch_send_call_function_ipi_mask(const struct cpumask *mask)
 325 {
 326         ipi_send_msg(mask, IPI_CALL_FUNC);
 327 }
 328
 329 /*
 330  * ipi_cpu_stop - handle IPI from smp_send_stop()
 331  */
 332 static void ipi_cpu_stop(void)
 333 {
 334         machine_halt();
 335 }
 336
 337 static inline int __do_IPI(unsigned long msg)
 338 {
 339         int rc = 0;
 340
 341         switch (msg) {
 342         case IPI_RESCHEDULE:
 343                 scheduler_ipi();
 344                 break;
 345
 346         case IPI_CALL_FUNC:
 347                 generic_smp_call_function_interrupt();
 348                 break;
 349
 350         case IPI_CPU_STOP:
 351                 ipi_cpu_stop();
 352                 break;
 353
 354         default:
 355                 rc = 1;
 356         }
 357
 358         return rc;
 359 }
 360
 361 /*
 362  * arch-common ISR to handle for inter-processor interrupts
 363  * Has hooks for platform specific IPI
 364  */
 365 irqreturn_t do_IPI(int irq, void *dev_id)
 366 {
 367         unsigned long pending;
 368         unsigned long __maybe_unused copy;
 369
 370         pr_debug("IPI [%ld] received on cpu %d\n",
 371                  *this_cpu_ptr(&ipi_data), smp_processor_id());
 372
 373         if (plat_smp_ops.ipi_clear)
 374                 plat_smp_ops.ipi_clear(irq);
 375
 376         /*
 377          * "dequeue" the msg corresponding to this IPI (and possibly other
 378          * piggybacked msg from elided IPIs: see ipi_send_msg_one() above)
 379          */
 380         copy = pending = xchg(this_cpu_ptr(&ipi_data), 0);
 381
 382         do {
 383                 unsigned long msg = __ffs(pending);
 384                 int rc;
 385
 386                 rc = __do_IPI(msg);
 387                 if (rc)
 388                         pr_info("IPI with bogus msg %ld in %ld\n", msg, copy);
 389                 pending &= ~(1U << msg);
 390         } while (pending);
 391
 392         return IRQ_HANDLED;
 393 }
 394
 395 /*
 396  * API called by platform code to hookup arch-common ISR to their IPI IRQ
 397  *
 398  * Note: If IPI is provided by platform (vs. say ARC MCIP), their intc setup/map
 399  * function needs to call call irq_set_percpu_devid() for IPI IRQ, otherwise
 400  * request_percpu_irq() below will fail
 401  */
 402 static DEFINE_PER_CPU(int, ipi_dev);
 403
 404 int smp_ipi_irq_setup(int cpu, irq_hw_number_t hwirq)
 405 {
 406         int *dev = per_cpu_ptr(&ipi_dev, cpu);
 407         unsigned int virq = irq_find_mapping(NULL, hwirq);
 408
 409         if (!virq)
 410                 panic("Cannot find virq for root domain and hwirq=%lu", hwirq);
 411
 412         /* Boot cpu calls request, all call enable */
 413         if (!cpu) {
 414                 int rc;
 415
 416                 rc = request_percpu_irq(virq, do_IPI, "IPI Interrupt", dev);
 417                 if (rc)
 418                         panic("Percpu IRQ request failed for %u\n", virq);
 419         }
 420
 421         enable_percpu_irq(virq, 0);
 422
 423         return 0;
 424 }