| blob | 019f1c3d4d30b80cc3c65c27224ed51e315996c5 |
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * at91sam9260.dtsi - Device Tree Include file for AT91SAM9260 family SoC
4 *
5 * Copyright (C) 2011 Atmel,
6 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
7 * 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
8 */
10 #include <dt-bindings/pinctrl/at91.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/clock/at91.h>
15 / {
16 #address-cells = <1>;
17 #size-cells = <1>;
18 model = "Atmel AT91SAM9260 family SoC";
19 compatible = "atmel,at91sam9260";
20 interrupt-parent = <&aic>;
22 aliases {
23 serial0 = &dbgu;
24 serial1 = &usart0;
25 serial2 = &usart1;
26 serial3 = &usart2;
27 serial4 = &usart3;
28 serial5 = &uart0;
29 serial6 = &uart1;
30 gpio0 = &pioA;
31 gpio1 = &pioB;
32 gpio2 = &pioC;
33 tcb0 = &tcb0;
34 tcb1 = &tcb1;
35 i2c0 = &i2c0;
36 ssc0 = &ssc0;
37 };
38 cpus {
39 #address-cells = <1>;
40 #size-cells = <0>;
42 cpu@0 {
43 compatible = "arm,arm926ej-s";
44 device_type = "cpu";
45 reg = <0>;
46 };
47 };
49 memory@20000000 {
50 device_type = "memory";
51 reg = <0x20000000 0x04000000>;
52 };
54 clocks {
55 slow_xtal: slow_xtal {
56 compatible = "fixed-clock";
57 #clock-cells = <0>;
58 clock-frequency = <0>;
59 };
61 main_xtal: main_xtal {
62 compatible = "fixed-clock";
63 #clock-cells = <0>;
64 clock-frequency = <0>;
65 };
67 adc_op_clk: adc_op_clk{
68 compatible = "fixed-clock";
69 #clock-cells = <0>;
70 clock-frequency = <5000000>;
71 };
72 };
74 sram0: sram@2ff000 {
75 compatible = "mmio-sram";
76 reg = <0x002ff000 0x2000>;
77 #address-cells = <1>;
78 #size-cells = <1>;
79 ranges = <0 0x002ff000 0x2000>;
80 };
82 ahb {
83 compatible = "simple-bus";
84 #address-cells = <1>;
85 #size-cells = <1>;
86 ranges;
88 apb {
89 compatible = "simple-bus";
90 #address-cells = <1>;
91 #size-cells = <1>;
92 ranges;
94 aic: interrupt-controller@fffff000 {
95 #interrupt-cells = <3>;
96 compatible = "atmel,at91rm9200-aic";
97 interrupt-controller;
98 reg = <0xfffff000 0x200>;
99 atmel,external-irqs = <29 30 31>;
100 };
102 ramc0: ramc@ffffea00 {
103 compatible = "atmel,at91sam9260-sdramc";
104 reg = <0xffffea00 0x200>;
105 };
107 smc: smc@ffffec00 {
108 compatible = "atmel,at91sam9260-smc", "syscon";
109 reg = <0xffffec00 0x200>;
110 };
112 matrix: matrix@ffffee00 {
113 compatible = "atmel,at91sam9260-matrix", "syscon";
114 reg = <0xffffee00 0x200>;
115 };
117 pmc: pmc@fffffc00 {
118 compatible = "atmel,at91sam9260-pmc", "syscon";
119 reg = <0xfffffc00 0x100>;
120 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
121 #clock-cells = <2>;
122 clocks = <&slow_xtal>, <&main_xtal>;
123 clock-names = "slow_xtal", "main_xtal";
124 };
126 rstc@fffffd00 {
127 compatible = "atmel,at91sam9260-rstc";
128 reg = <0xfffffd00 0x10>;
129 clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
130 };
132 shdwc@fffffd10 {
133 compatible = "atmel,at91sam9260-shdwc";
134 reg = <0xfffffd10 0x10>;
135 clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
136 };
138 pit: timer@fffffd30 {
139 compatible = "atmel,at91sam9260-pit";
140 reg = <0xfffffd30 0xf>;
141 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
142 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
143 };
145 tcb0: timer@fffa0000 {
146 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
147 #address-cells = <1>;
148 #size-cells = <0>;
149 reg = <0xfffa0000 0x100>;
150 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0
151 18 IRQ_TYPE_LEVEL_HIGH 0
152 19 IRQ_TYPE_LEVEL_HIGH 0>;
153 clocks = <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&pmc PMC_TYPE_PERIPHERAL 19>, <&pmc PMC_TYPE_CORE PMC_SLOW>;
154 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
155 };
157 tcb1: timer@fffdc000 {
158 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
159 #address-cells = <1>;
160 #size-cells = <0>;
161 reg = <0xfffdc000 0x100>;
162 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0
163 27 IRQ_TYPE_LEVEL_HIGH 0
164 28 IRQ_TYPE_LEVEL_HIGH 0>;
165 clocks = <&pmc PMC_TYPE_PERIPHERAL 26>, <&pmc PMC_TYPE_PERIPHERAL 27>, <&pmc PMC_TYPE_PERIPHERAL 28>, <&pmc PMC_TYPE_CORE PMC_SLOW>;
166 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
167 };
169 pinctrl@fffff400 {
170 #address-cells = <1>;
171 #size-cells = <1>;
172 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
173 ranges = <0xfffff400 0xfffff400 0x600>;
175 atmel,mux-mask = <
176 /* A B */
177 0xffffffff 0xffc00c3b /* pioA */
178 0xffffffff 0x7fff3ccf /* pioB */
179 0xffffffff 0x007fffff /* pioC */
180 >;
182 /* shared pinctrl settings */
183 dbgu {
184 pinctrl_dbgu: dbgu-0 {
185 atmel,pins =
186 <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
187 AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
188 };
189 };
191 usart0 {
192 pinctrl_usart0: usart0-0 {
193 atmel,pins =
194 <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
195 AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
196 };
198 pinctrl_usart0_rts: usart0_rts-0 {
199 atmel,pins =
200 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */
201 };
203 pinctrl_usart0_cts: usart0_cts-0 {
204 atmel,pins =
205 <AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A */
206 };
208 pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
209 atmel,pins =
210 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A */
211 AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB22 periph A */
212 };
214 pinctrl_usart0_dcd: usart0_dcd-0 {
215 atmel,pins =
216 <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */
217 };
219 pinctrl_usart0_ri: usart0_ri-0 {
220 atmel,pins =
221 <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB25 periph A */
222 };
223 };
225 usart1 {
226 pinctrl_usart1: usart1-0 {
227 atmel,pins =
228 <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
229 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
230 };
232 pinctrl_usart1_rts: usart1_rts-0 {
233 atmel,pins =
234 <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB28 periph A */
235 };
237 pinctrl_usart1_cts: usart1_cts-0 {
238 atmel,pins =
239 <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB29 periph A */
240 };
241 };
243 usart2 {
244 pinctrl_usart2: usart2-0 {
245 atmel,pins =
246 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
247 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
248 };
250 pinctrl_usart2_rts: usart2_rts-0 {
251 atmel,pins =
252 <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA4 periph A */
253 };
255 pinctrl_usart2_cts: usart2_cts-0 {
256 atmel,pins =
257 <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA5 periph A */
258 };
259 };
261 usart3 {
262 pinctrl_usart3: usart3-0 {
263 atmel,pins =
264 <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
265 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
266 };
268 pinctrl_usart3_rts: usart3_rts-0 {
269 atmel,pins =
270 <AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
271 };
273 pinctrl_usart3_cts: usart3_cts-0 {
274 atmel,pins =
275 <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
276 };
277 };
279 uart0 {
280 pinctrl_uart0: uart0-0 {
281 atmel,pins =
282 <AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP
283 AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;
284 };
285 };
287 uart1 {
288 pinctrl_uart1: uart1-0 {
289 atmel,pins =
290 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
291 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
292 };
293 };
295 nand {
296 pinctrl_nand_rb: nand-rb-0 {
297 atmel,pins =
298 <AT91_PIOC 13 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
299 };
301 pinctrl_nand_cs: nand-cs-0 {
302 atmel,pins =
303 <AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
304 };
305 };
307 macb {
308 pinctrl_macb_rmii: macb_rmii-0 {
309 atmel,pins =
310 <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
311 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */
312 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */
313 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */
314 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA16 periph A */
315 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
316 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA18 periph A */
317 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA19 periph A */
318 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA20 periph A */
319 AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */
320 };
322 pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
323 atmel,pins =
324 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */
325 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA23 periph B */
326 AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
327 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
328 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */
329 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
330 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
331 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
332 };
334 pinctrl_macb_rmii_mii_alt: macb_rmii_mii-1 {
335 atmel,pins =
336 <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA10 periph B */
337 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA11 periph B */
338 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */
339 AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
340 AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */
341 AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
342 AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
343 AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
344 };
345 };
347 mmc0 {
348 pinctrl_mmc0_clk: mmc0_clk-0 {
349 atmel,pins =
350 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */
351 };
353 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
354 atmel,pins =
355 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
356 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA6 periph A with pullup */
357 };
359 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
360 atmel,pins =
361 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */
362 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */
363 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */
364 };
366 pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
367 atmel,pins =
368 <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA1 periph B with pullup */
369 AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA0 periph B with pullup */
370 };
372 pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
373 atmel,pins =
374 <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA5 periph B with pullup */
375 AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA4 periph B with pullup */
376 AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA3 periph B with pullup */
377 };
378 };
380 ssc0 {
381 pinctrl_ssc0_tx: ssc0_tx-0 {
382 atmel,pins =
383 <AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */
384 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A */
385 AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
386 };
388 pinctrl_ssc0_rx: ssc0_rx-0 {
389 atmel,pins =
390 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB19 periph A */
391 AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB20 periph A */
392 AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB21 periph A */
393 };
394 };
396 spi0 {
397 pinctrl_spi0: spi0-0 {
398 atmel,pins =
399 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A SPI0_MISO pin */
400 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A SPI0_MOSI pin */
401 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A SPI0_SPCK pin */
402 };
403 };
405 spi1 {
406 pinctrl_spi1: spi1-0 {
407 atmel,pins =
408 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A SPI1_MISO pin */
409 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A SPI1_MOSI pin */
410 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A SPI1_SPCK pin */
411 };
412 };
414 i2c_gpio0 {
415 pinctrl_i2c_gpio0: i2c_gpio0-0 {
416 atmel,pins =
417 <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE
418 AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
419 };
420 };
422 tcb0 {
423 pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
424 atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
425 };
427 pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
428 atmel,pins = <AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;
429 };
431 pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
432 atmel,pins = <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
433 };
435 pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
436 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
437 };
439 pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
440 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
441 };
443 pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
444 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
445 };
447 pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
448 atmel,pins = <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
449 };
451 pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
452 atmel,pins = <AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;
453 };
455 pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
456 atmel,pins = <AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;
457 };
458 };
460 tcb1 {
461 pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
462 atmel,pins = <AT91_PIOB 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
463 };
465 pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
466 atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
467 };
469 pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
470 atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
471 };
473 pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
474 atmel,pins = <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;
475 };
477 pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
478 atmel,pins = <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
479 };
481 pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
482 atmel,pins = <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
483 };
485 pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
486 atmel,pins = <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;
487 };
489 pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
490 atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
491 };
493 pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
494 atmel,pins = <AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
495 };
496 };
498 pioA: gpio@fffff400 {
499 compatible = "atmel,at91rm9200-gpio";
500 reg = <0xfffff400 0x200>;
501 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
502 #gpio-cells = <2>;
503 gpio-controller;
504 interrupt-controller;
505 #interrupt-cells = <2>;
506 clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
507 };
509 pioB: gpio@fffff600 {
510 compatible = "atmel,at91rm9200-gpio";
511 reg = <0xfffff600 0x200>;
512 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
513 #gpio-cells = <2>;
514 gpio-controller;
515 interrupt-controller;
516 #interrupt-cells = <2>;
517 clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
518 };
520 pioC: gpio@fffff800 {
521 compatible = "atmel,at91rm9200-gpio";
522 reg = <0xfffff800 0x200>;
523 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
524 #gpio-cells = <2>;
525 gpio-controller;
526 interrupt-controller;
527 #interrupt-cells = <2>;
528 clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
529 };
530 };
532 dbgu: serial@fffff200 {
533 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
534 reg = <0xfffff200 0x200>;
535 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
536 pinctrl-names = "default";
537 pinctrl-0 = <&pinctrl_dbgu>;
538 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
539 clock-names = "usart";
540 status = "disabled";
541 };
543 usart0: serial@fffb0000 {
544 compatible = "atmel,at91sam9260-usart";
545 reg = <0xfffb0000 0x200>;
546 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
547 atmel,use-dma-rx;
548 atmel,use-dma-tx;
549 pinctrl-names = "default";
550 pinctrl-0 = <&pinctrl_usart0>;
551 clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
552 clock-names = "usart";
553 status = "disabled";
554 };
556 usart1: serial@fffb4000 {
557 compatible = "atmel,at91sam9260-usart";
558 reg = <0xfffb4000 0x200>;
559 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
560 atmel,use-dma-rx;
561 atmel,use-dma-tx;
562 pinctrl-names = "default";
563 pinctrl-0 = <&pinctrl_usart1>;
564 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
565 clock-names = "usart";
566 status = "disabled";
567 };
569 usart2: serial@fffb8000 {
570 compatible = "atmel,at91sam9260-usart";
571 reg = <0xfffb8000 0x200>;
572 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
573 atmel,use-dma-rx;
574 atmel,use-dma-tx;
575 pinctrl-names = "default";
576 pinctrl-0 = <&pinctrl_usart2>;
577 clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
578 clock-names = "usart";
579 status = "disabled";
580 };
582 usart3: serial@fffd0000 {
583 compatible = "atmel,at91sam9260-usart";
584 reg = <0xfffd0000 0x200>;
585 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>;
586 atmel,use-dma-rx;
587 atmel,use-dma-tx;
588 pinctrl-names = "default";
589 pinctrl-0 = <&pinctrl_usart3>;
590 clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
591 clock-names = "usart";
592 status = "disabled";
593 };
595 uart0: serial@fffd4000 {
596 compatible = "atmel,at91sam9260-usart";
597 reg = <0xfffd4000 0x200>;
598 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 5>;
599 atmel,use-dma-rx;
600 atmel,use-dma-tx;
601 pinctrl-names = "default";
602 pinctrl-0 = <&pinctrl_uart0>;
603 clocks = <&pmc PMC_TYPE_PERIPHERAL 24>;
604 clock-names = "usart";
605 status = "disabled";
606 };
608 uart1: serial@fffd8000 {
609 compatible = "atmel,at91sam9260-usart";
610 reg = <0xfffd8000 0x200>;
611 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 5>;
612 atmel,use-dma-rx;
613 atmel,use-dma-tx;
614 pinctrl-names = "default";
615 pinctrl-0 = <&pinctrl_uart1>;
616 clocks = <&pmc PMC_TYPE_PERIPHERAL 25>;
617 clock-names = "usart";
618 status = "disabled";
619 };
621 macb0: ethernet@fffc4000 {
622 compatible = "cdns,at91sam9260-macb", "cdns,macb";
623 reg = <0xfffc4000 0x100>;
624 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
625 pinctrl-names = "default";
626 pinctrl-0 = <&pinctrl_macb_rmii>;
627 clocks = <&pmc PMC_TYPE_PERIPHERAL 21>, <&pmc PMC_TYPE_PERIPHERAL 21>;
628 clock-names = "hclk", "pclk";
629 status = "disabled";
630 };
632 usb1: gadget@fffa4000 {
633 compatible = "atmel,at91sam9260-udc";
634 reg = <0xfffa4000 0x4000>;
635 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
636 clocks = <&pmc PMC_TYPE_PERIPHERAL 10>, <&pmc PMC_TYPE_SYSTEM 7>;
637 clock-names = "pclk", "hclk";
638 status = "disabled";
639 };
641 i2c0: i2c@fffac000 {
642 compatible = "atmel,at91sam9260-i2c";
643 reg = <0xfffac000 0x100>;
644 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
645 #address-cells = <1>;
646 #size-cells = <0>;
647 clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
648 status = "disabled";
649 };
651 mmc0: mmc@fffa8000 {
652 compatible = "atmel,hsmci";
653 reg = <0xfffa8000 0x600>;
654 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
655 #address-cells = <1>;
656 #size-cells = <0>;
657 clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
658 clock-names = "mci_clk";
659 status = "disabled";
660 };
662 ssc0: ssc@fffbc000 {
663 compatible = "atmel,at91rm9200-ssc";
664 reg = <0xfffbc000 0x4000>;
665 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
666 pinctrl-names = "default";
667 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
668 clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
669 clock-names = "pclk";
670 status = "disabled";
671 };
673 spi0: spi@fffc8000 {
674 #address-cells = <1>;
675 #size-cells = <0>;
676 compatible = "atmel,at91rm9200-spi";
677 reg = <0xfffc8000 0x200>;
678 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
679 pinctrl-names = "default";
680 pinctrl-0 = <&pinctrl_spi0>;
681 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
682 clock-names = "spi_clk";
683 status = "disabled";
684 };
686 spi1: spi@fffcc000 {
687 #address-cells = <1>;
688 #size-cells = <0>;
689 compatible = "atmel,at91rm9200-spi";
690 reg = <0xfffcc000 0x200>;
691 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
692 pinctrl-names = "default";
693 pinctrl-0 = <&pinctrl_spi1>;
694 clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
695 clock-names = "spi_clk";
696 status = "disabled";
697 };
699 adc0: adc@fffe0000 {
700 compatible = "atmel,at91sam9260-adc";
701 reg = <0xfffe0000 0x100>;
702 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 0>;
703 clocks = <&pmc PMC_TYPE_PERIPHERAL 5>, <&adc_op_clk>;
704 clock-names = "adc_clk", "adc_op_clk";
705 atmel,adc-use-external-triggers;
706 atmel,adc-channels-used = <0xf>;
707 atmel,adc-vref = <3300>;
708 atmel,adc-startup-time = <15>;
709 };
711 rtc@fffffd20 {
712 compatible = "atmel,at91sam9260-rtt";
713 reg = <0xfffffd20 0x10>;
714 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
715 clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
716 status = "disabled";
717 };
719 watchdog: watchdog@fffffd40 {
720 compatible = "atmel,at91sam9260-wdt";
721 reg = <0xfffffd40 0x10>;
722 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
723 clocks = <&pmc PMC_TYPE_CORE PMC_SLOW>;
724 atmel,watchdog-type = "hardware";
725 atmel,reset-type = "all";
726 atmel,dbg-halt;
727 status = "disabled";
728 };
730 gpbr: syscon@fffffd50 {
731 compatible = "atmel,at91sam9260-gpbr", "syscon";
732 reg = <0xfffffd50 0x10>;
733 status = "disabled";
734 };
735 };
737 usb0: ohci@500000 {
738 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
739 reg = <0x00500000 0x100000>;
740 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
741 clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&pmc PMC_TYPE_PERIPHERAL 20>, <&pmc PMC_TYPE_SYSTEM 6>;
742 clock-names = "ohci_clk", "hclk", "uhpck";
743 status = "disabled";
744 };
746 ebi: ebi@10000000 {
747 compatible = "atmel,at91sam9260-ebi";
748 #address-cells = <2>;
749 #size-cells = <1>;
750 atmel,smc = <&smc>;
751 atmel,matrix = <&matrix>;
752 reg = <0x10000000 0x80000000>;
753 ranges = <0x0 0x0 0x10000000 0x10000000
754 0x1 0x0 0x20000000 0x10000000
755 0x2 0x0 0x30000000 0x10000000
756 0x3 0x0 0x40000000 0x10000000
757 0x4 0x0 0x50000000 0x10000000
758 0x5 0x0 0x60000000 0x10000000
759 0x6 0x0 0x70000000 0x10000000
760 0x7 0x0 0x80000000 0x10000000>;
761 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
762 status = "disabled";
764 nand_controller: nand-controller {
765 compatible = "atmel,at91sam9260-nand-controller";
766 #address-cells = <2>;
767 #size-cells = <1>;
768 ranges;
769 status = "disabled";
770 };
771 };
772 };
774 i2c_gpio0: i2c-gpio-0 {
775 compatible = "i2c-gpio";
776 gpios = <&pioA 23 GPIO_ACTIVE_HIGH /* sda */
777 &pioA 24 GPIO_ACTIVE_HIGH /* scl */
778 >;
779 i2c-gpio,sda-open-drain;
780 i2c-gpio,scl-open-drain;
781 i2c-gpio,delay-us = <2>; /* ~100 kHz */
782 #address-cells = <1>;
783 #size-cells = <0>;
784 pinctrl-names = "default";
785 pinctrl-0 = <&pinctrl_i2c_gpio0>;
786 status = "disabled";
787 };
788 };