arch/arm/boot/dts/bcm2836.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 #include "bcm283x.dtsi"
   3 #include "bcm2835-common.dtsi"
   4 #include "bcm2835-rpi-common.dtsi"
   5
   6 / {
   7         compatible = "brcm,bcm2836";
   8
   9         soc {
  10                 ranges = <0x7e000000 0x3f000000 0x1000000>,
  11                          <0x40000000 0x40000000 0x00001000>;
  12                 dma-ranges = <0xc0000000 0x00000000 0x3f000000>;
  13
  14                 local_intc: local_intc@40000000 {
  15                         compatible = "brcm,bcm2836-l1-intc";
  16                         reg = <0x40000000 0x100>;
  17                         interrupt-controller;
  18                         #interrupt-cells = <2>;
  19                         interrupt-parent = <&local_intc>;
  20                 };
  21         };
  22
  23         arm-pmu {
  24                 compatible = "arm,cortex-a7-pmu";
  25                 interrupt-parent = <&local_intc>;
  26                 interrupts = <9 IRQ_TYPE_LEVEL_HIGH>;
  27         };
  28
  29         timer {
  30                 compatible = "arm,armv7-timer";
  31                 interrupt-parent = <&local_intc>;
  32                 interrupts = <0 IRQ_TYPE_LEVEL_HIGH>, // PHYS_SECURE_PPI
  33                              <1 IRQ_TYPE_LEVEL_HIGH>, // PHYS_NONSECURE_PPI
  34                              <3 IRQ_TYPE_LEVEL_HIGH>, // VIRT_PPI
  35                              <2 IRQ_TYPE_LEVEL_HIGH>; // HYP_PPI
  36                 always-on;
  37         };
  38
  39         cpus: cpus {
  40                 #address-cells = <1>;
  41                 #size-cells = <0>;
  42                 enable-method = "brcm,bcm2836-smp";
  43
  44                 v7_cpu0: cpu@0 {
  45                         device_type = "cpu";
  46                         compatible = "arm,cortex-a7";
  47                         reg = <0xf00>;
  48                         clock-frequency = <800000000>;
  49                 };
  50
  51                 v7_cpu1: cpu@1 {
  52                         device_type = "cpu";
  53                         compatible = "arm,cortex-a7";
  54                         reg = <0xf01>;
  55                         clock-frequency = <800000000>;
  56                 };
  57
  58                 v7_cpu2: cpu@2 {
  59                         device_type = "cpu";
  60                         compatible = "arm,cortex-a7";
  61                         reg = <0xf02>;
  62                         clock-frequency = <800000000>;
  63                 };
  64
  65                 v7_cpu3: cpu@3 {
  66                         device_type = "cpu";
  67                         compatible = "arm,cortex-a7";
  68                         reg = <0xf03>;
  69                         clock-frequency = <800000000>;
  70                 };
  71         };
  72 };
  73
  74 /* Make the BCM2835-style global interrupt controller be a child of the
  75  * CPU-local interrupt controller.
  76  */
  77 &intc {
  78         compatible = "brcm,bcm2836-armctrl-ic";
  79         reg = <0x7e00b200 0x200>;
  80         interrupt-parent = <&local_intc>;
  81         interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
  82 };
  83
  84 &cpu_thermal {
  85         coefficients = <(-538)  407000>;
  86 };
  87
  88 /* enable thermal sensor with the correct compatible property set */
  89 &thermal {
  90         compatible = "brcm,bcm2836-thermal";
  91         status = "okay";
  92 };