1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2013 Gateworks Corporation
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
11 /* these are used by bootloader for disabling nodes */
23 bootargs = "console=ttymxc1,115200";
27 compatible = "pwm-backlight";
28 pwms = <&pwm4 0 5000000>;
29 brightness-levels = <0 4 8 16 32 64 128 255>;
30 default-brightness-level = <7>;
34 compatible = "gpio-keys";
40 gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
47 interrupt-parent = <&gsc>;
54 interrupt-parent = <&gsc>;
61 interrupt-parent = <&gsc>;
68 interrupt-parent = <&gsc>;
73 label = "switch_hold";
75 interrupt-parent = <&gsc>;
81 compatible = "gpio-leds";
82 pinctrl-names = "default";
83 pinctrl-0 = <&pinctrl_gpio_leds>;
87 gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
89 linux,default-trigger = "heartbeat";
94 gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
95 default-state = "off";
100 gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
101 default-state = "off";
106 device_type = "memory";
107 reg = <0x10000000 0x40000000>;
111 compatible = "pps-gpio";
112 pinctrl-names = "default";
113 pinctrl-0 = <&pinctrl_pps>;
114 gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
118 reg_1p0v: regulator-1p0v {
119 compatible = "regulator-fixed";
120 regulator-name = "1P0V";
121 regulator-min-microvolt = <1000000>;
122 regulator-max-microvolt = <1000000>;
126 reg_3p3v: regulator-3p3v {
127 compatible = "regulator-fixed";
128 regulator-name = "3P3V";
129 regulator-min-microvolt = <3300000>;
130 regulator-max-microvolt = <3300000>;
134 reg_usb_h1_vbus: regulator-usb-h1-vbus {
135 compatible = "regulator-fixed";
136 regulator-name = "usb_h1_vbus";
137 regulator-min-microvolt = <5000000>;
138 regulator-max-microvolt = <5000000>;
142 reg_usb_otg_vbus: regulator-usb-otg-vbus {
143 compatible = "regulator-fixed";
144 regulator-name = "usb_otg_vbus";
145 regulator-min-microvolt = <5000000>;
146 regulator-max-microvolt = <5000000>;
147 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
152 compatible = "fsl,imx6q-ventana-sgtl5000",
153 "fsl,imx-audio-sgtl5000";
154 model = "sgtl5000-audio";
155 ssi-controller = <&ssi1>;
156 audio-codec = <&codec>;
158 "MIC_IN", "Mic Jack",
159 "Mic Jack", "Mic Bias",
160 "Headphone Jack", "HP_OUT";
167 pinctrl-names = "default";
168 pinctrl-0 = <&pinctrl_audmux>;
173 pinctrl-names = "default";
174 pinctrl-0 = <&pinctrl_flexcan1>;
179 assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
180 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
181 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
182 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
186 pinctrl-names = "default";
187 pinctrl-0 = <&pinctrl_enet>;
188 phy-mode = "rgmii-id";
189 phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
194 pinctrl-names = "default";
195 pinctrl-0 = <&pinctrl_gpmi_nand>;
200 ddc-i2c-bus = <&i2c3>;
205 clock-frequency = <100000>;
206 pinctrl-names = "default";
207 pinctrl-0 = <&pinctrl_i2c1>;
211 compatible = "gw,gsc";
213 interrupt-parent = <&gpio1>;
214 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
215 interrupt-controller;
216 #interrupt-cells = <1>;
220 compatible = "gw,gsc-adc";
221 #address-cells = <1>;
311 compatible = "nxp,pca9555";
315 interrupt-parent = <&gsc>;
320 compatible = "atmel,24c02";
326 compatible = "atmel,24c02";
332 compatible = "atmel,24c02";
338 compatible = "atmel,24c02";
344 compatible = "dallas,ds1672";
350 clock-frequency = <100000>;
351 pinctrl-names = "default";
352 pinctrl-0 = <&pinctrl_i2c2>;
356 compatible = "lltc,ltc3676";
358 interrupt-parent = <&gpio1>;
359 interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
362 /* VDD_SOC (1+R1/R2 = 1.635) */
364 regulator-name = "vddsoc";
365 regulator-min-microvolt = <674400>;
366 regulator-max-microvolt = <1308000>;
367 lltc,fb-voltage-divider = <127000 200000>;
368 regulator-ramp-delay = <7000>;
373 /* VDD_1P8 (1+R1/R2 = 2.505): GPS/VideoIn/ENET-PHY */
375 regulator-name = "vdd1p8";
376 regulator-min-microvolt = <1033310>;
377 regulator-max-microvolt = <2004000>;
378 lltc,fb-voltage-divider = <301000 200000>;
379 regulator-ramp-delay = <7000>;
384 /* VDD_ARM (1+R1/R2 = 1.635) */
386 regulator-name = "vddarm";
387 regulator-min-microvolt = <674400>;
388 regulator-max-microvolt = <1308000>;
389 lltc,fb-voltage-divider = <127000 200000>;
390 regulator-ramp-delay = <7000>;
395 /* VDD_DDR (1+R1/R2 = 2.105) */
397 regulator-name = "vddddr";
398 regulator-min-microvolt = <868310>;
399 regulator-max-microvolt = <1684000>;
400 lltc,fb-voltage-divider = <221000 200000>;
401 regulator-ramp-delay = <7000>;
406 /* VDD_2P5 (1+R1/R2 = 3.435): PCIe/ENET-PHY */
408 regulator-name = "vdd2p5";
409 regulator-min-microvolt = <2490375>;
410 regulator-max-microvolt = <2490375>;
411 lltc,fb-voltage-divider = <487000 200000>;
416 /* VDD_AUD_1P8: Audio codec */
418 regulator-name = "vdd1p8a";
419 regulator-min-microvolt = <1800000>;
420 regulator-max-microvolt = <1800000>;
424 /* VDD_HIGH (1+R1/R2 = 4.17) */
426 regulator-name = "vdd3p0";
427 regulator-min-microvolt = <3023250>;
428 regulator-max-microvolt = <3023250>;
429 lltc,fb-voltage-divider = <634000 200000>;
438 clock-frequency = <100000>;
439 pinctrl-names = "default";
440 pinctrl-0 = <&pinctrl_i2c3>;
444 compatible = "fsl,sgtl5000";
446 clocks = <&clks IMX6QDL_CLK_CKO>;
447 VDDA-supply = <®_1p8v>;
448 VDDIO-supply = <®_3p3v>;
451 touchscreen: egalax_ts@4 {
452 compatible = "eeti,egalax_ts";
454 interrupt-parent = <&gpio1>;
456 wakeup-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
460 compatible = "nxp,fxos8700";
469 fsl,data-mapping = "spwg";
470 fsl,data-width = <18>;
474 native-mode = <&timing0>;
475 timing0: hsd100pxn1 {
476 clock-frequency = <65000000>;
491 pinctrl-names = "default";
492 pinctrl-0 = <&pinctrl_pcie>;
493 reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
498 pinctrl-names = "default";
499 pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
504 pinctrl-names = "default";
505 pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
511 pinctrl-names = "default";
512 pinctrl-0 = <&pinctrl_pwm4>;
521 pinctrl-names = "default";
522 pinctrl-0 = <&pinctrl_uart1>;
523 rts-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
528 pinctrl-names = "default";
529 pinctrl-0 = <&pinctrl_uart2>;
534 pinctrl-names = "default";
535 pinctrl-0 = <&pinctrl_uart5>;
540 vbus-supply = <®_usb_otg_vbus>;
541 pinctrl-names = "default";
542 pinctrl-0 = <&pinctrl_usbotg>;
543 disable-over-current;
548 vbus-supply = <®_usb_h1_vbus>;
553 pinctrl-names = "default", "state_100mhz", "state_200mhz";
554 pinctrl-0 = <&pinctrl_usdhc3>;
555 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
556 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
557 cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
558 vmmc-supply = <®_3p3v>;
559 no-1-8-v; /* firmware will remove if board revision supports */
564 pinctrl-names = "default";
565 pinctrl-0 = <&pinctrl_wdog>;
566 fsl,ext-reset-output;
570 pinctrl_audmux: audmuxgrp {
572 MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
573 MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
574 MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
575 MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
576 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* AUD4_MCK */
580 pinctrl_enet: enetgrp {
582 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
583 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
584 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
585 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
586 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
587 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
588 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
589 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
590 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
591 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
592 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
593 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
594 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
595 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
596 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
597 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
601 pinctrl_flexcan1: flexcan1grp {
603 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1
604 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1
605 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x4001b0b0 /* CAN_STBY */
609 pinctrl_gpio_leds: gpioledsgrp {
611 MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
612 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
613 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
617 pinctrl_gpmi_nand: gpminandgrp {
619 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
620 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
621 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
622 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
623 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
624 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
625 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
626 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
627 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
628 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
629 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
630 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
631 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
632 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
633 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
637 pinctrl_i2c1: i2c1grp {
639 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
640 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
641 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0xb0b1
645 pinctrl_i2c2: i2c2grp {
647 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
648 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
652 pinctrl_i2c3: i2c3grp {
654 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
655 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
659 pinctrl_pcie: pciegrp {
661 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 /* PCIE IRQ */
662 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0 /* PCIE RST */
666 pinctrl_pmic: pmicgrp {
668 MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0001b0b0 /* PMIC_IRQ# */
672 pinctrl_pps: ppsgrp {
674 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
678 pinctrl_pwm2: pwm2grp {
680 MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
684 pinctrl_pwm3: pwm3grp {
686 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
690 pinctrl_pwm4: pwm4grp {
692 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
696 pinctrl_uart1: uart1grp {
698 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
699 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
700 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x4001b0b1 /* TEN */
704 pinctrl_uart2: uart2grp {
706 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
707 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
711 pinctrl_uart5: uart5grp {
713 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
714 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
718 pinctrl_usbotg: usbotggrp {
720 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
721 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* PWR_EN */
722 MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x1b0b0 /* OC */
726 pinctrl_usdhc3: usdhc3grp {
728 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
729 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
730 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
731 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
732 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
733 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
734 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* CD */
735 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x17059
739 pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
741 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9
742 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9
743 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
744 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
745 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
746 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
747 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170b9 /* CD */
748 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170b9
752 pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
754 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
755 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
756 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
757 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
758 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
759 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
760 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170f9 /* CD */
761 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9
765 pinctrl_wdog: wdoggrp {
767 MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0