WIP FPC-III support
[linux/fpc-iii.git] / arch / arm / boot / dts / imx6qp-sabresd.dts
blob480e73183f6b10697183cee1cfc2eb6a7144baab
1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
2 //
3 // Copyright 2016 Freescale Semiconductor, Inc.
5 /dts-v1/;
7 #include "imx6qp.dtsi"
8 #include "imx6qdl-sabresd.dtsi"
10 / {
11         model = "Freescale i.MX6 Quad Plus SABRE Smart Device Board";
12         compatible = "fsl,imx6qp-sabresd", "fsl,imx6qp";
15 &reg_arm {
16         vin-supply = <&sw2_reg>;
19 &iomuxc {
20         imx6qdl-sabresd {
21                 pinctrl_usdhc2: usdhc2grp {
22                         fsl,pins = <
23                                 MX6QDL_PAD_SD2_CMD__SD2_CMD             0x17059
24                                 MX6QDL_PAD_SD2_CLK__SD2_CLK             0x10071
25                                 MX6QDL_PAD_SD2_DAT0__SD2_DATA0          0x17059
26                                 MX6QDL_PAD_SD2_DAT1__SD2_DATA1          0x17059
27                                 MX6QDL_PAD_SD2_DAT2__SD2_DATA2          0x17059
28                                 MX6QDL_PAD_SD2_DAT3__SD2_DATA3          0x17059
29                                 MX6QDL_PAD_NANDF_D4__SD2_DATA4          0x17059
30                                 MX6QDL_PAD_NANDF_D5__SD2_DATA5          0x17059
31                                 MX6QDL_PAD_NANDF_D6__SD2_DATA6          0x17059
32                                 MX6QDL_PAD_NANDF_D7__SD2_DATA7          0x17059
33                         >;
34                 };
36                 pinctrl_usdhc3: usdhc3grp {
37                         fsl,pins = <
38                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
39                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10071
40                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
41                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
42                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
43                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
44                                 MX6QDL_PAD_SD3_DAT4__SD3_DATA4          0x17059
45                                 MX6QDL_PAD_SD3_DAT5__SD3_DATA5          0x17059
46                                 MX6QDL_PAD_SD3_DAT6__SD3_DATA6          0x17059
47                                 MX6QDL_PAD_SD3_DAT7__SD3_DATA7          0x17059
48                         >;
49                 };
50         };
53 &pcie {
54         status = "disabled";
57 &sata {
58         status = "okay";