arch/arm/boot/dts/logicpd-torpedo-som.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-only
   2
   3 #include <dt-bindings/input/input.h>
   4
   5 / {
   6         chosen {
   7                 stdout-path = &uart1;
   8         };
   9
  10         cpus {
  11                 cpu@0 {
  12                         cpu0-supply = <&vcc>;
  13                 };
  14         };
  15
  16         memory@80000000 {
  17                 device_type = "memory";
  18                 reg = <0x80000000 0>;
  19         };
  20
  21         leds {
  22                 compatible = "gpio-leds";
  23                 user0 {
  24                         label = "user0";
  25                         gpios = <&twl_gpio 18 GPIO_ACTIVE_LOW>; /* LEDA */
  26                         linux,default-trigger = "none";
  27                 };
  28         };
  29
  30         /* fixed 26MHz oscillator */
  31         hfclk_26m: oscillator {
  32                 #clock-cells = <0>;
  33                 compatible = "fixed-clock";
  34                 clock-frequency = <26000000>;
  35         };
  36 };
  37
  38 /* The Torpedo doesn't route the USB host pins */
  39 &usbhshost {
  40         status = "disabled";
  41 };
  42
  43 &gpmc {
  44         ranges = <0 0 0x30000000 0x1000000>;    /* CS0: 16MB for NAND */
  45
  46         nand@0,0 {
  47                 compatible = "ti,omap2-nand";
  48                 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
  49                 interrupt-parent = <&gpmc>;
  50                 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
  51                              <1 IRQ_TYPE_NONE>; /* termcount */
  52                 linux,mtd-name = "micron,mt29f4g16abbda3w";
  53                 nand-bus-width = <16>;
  54                 ti,nand-ecc-opt = "bch8";
  55                 rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
  56                 gpmc,sync-clk-ps = <0>;
  57                 gpmc,cs-on-ns = <0>;
  58                 gpmc,cs-rd-off-ns = <44>;
  59                 gpmc,cs-wr-off-ns = <44>;
  60                 gpmc,adv-on-ns = <6>;
  61                 gpmc,adv-rd-off-ns = <34>;
  62                 gpmc,adv-wr-off-ns = <44>;
  63                 gpmc,we-off-ns = <40>;
  64                 gpmc,oe-off-ns = <54>;
  65                 gpmc,access-ns = <64>;
  66                 gpmc,rd-cycle-ns = <82>;
  67                 gpmc,wr-cycle-ns = <82>;
  68                 gpmc,wr-access-ns = <40>;
  69                 gpmc,wr-data-mux-bus-ns = <0>;
  70                 gpmc,device-width = <2>;
  71                 #address-cells = <1>;
  72                 #size-cells = <1>;
  73         };
  74 };
  75
  76 &i2c1 {
  77         pinctrl-names = "default";
  78         pinctrl-0 = <&i2c1_pins>;
  79         clock-frequency = <2600000>;
  80
  81         twl: twl@48 {
  82                 reg = <0x48>;
  83                 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
  84                 interrupt-parent = <&intc>;
  85                 clocks = <&hfclk_26m>;
  86                 clock-names = "fck";
  87
  88                 twl_audio: audio {
  89                         compatible = "ti,twl4030-audio";
  90                         codec {
  91                         };
  92                 };
  93         };
  94 };
  95
  96 &i2c2 {
  97         pinctrl-names = "default";
  98         pinctrl-0 = <&i2c2_pins>;
  99         clock-frequency = <400000>;
 100 };
 101
 102 &i2c3 {
 103         pinctrl-names = "default";
 104         pinctrl-0 = <&i2c3_pins>;
 105         clock-frequency = <400000>;
 106         at24@50 {
 107                 compatible = "atmel,24c64";
 108                 readonly;
 109                 reg = <0x50>;
 110         };
 111 };
 112
 113 &omap3_pmx_core {
 114         mcbsp2_pins: pinmux_mcbsp2_pins {
 115                 pinctrl-single,pins = <
 116                         OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0)        /* mcbsp2_fsx */
 117                         OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0)        /* mcbsp2_clkx */
 118                         OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0)        /* mcbsp2_dr */
 119                         OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0)       /* mcbsp2_dx */
 120                 >;
 121         };
 122         uart2_pins: pinmux_uart2_pins {
 123                 pinctrl-single,pins = <
 124                         OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT | MUX_MODE0)        /* uart2_cts.uart2_cts */
 125                         OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0)       /* uart2_rts .uart2_rts*/
 126                         OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0)       /* uart2_tx.uart2_tx */
 127                         OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0)        /* uart2_rx.uart2_rx */
 128                         OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4)       /* GPIO_162,BT_EN */
 129                 >;
 130         };
 131         mcspi1_pins: pinmux_mcspi1_pins {
 132                 pinctrl-single,pins = <
 133                         OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0)        /* mcspi1_clk.mcspi1_clk */
 134                         OMAP3_CORE1_IOPAD(0x21ca, PIN_OUTPUT | MUX_MODE0)       /* mcspi1_simo.mcspi1_simo */
 135                         OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi1_somi.mcspi1_somi */
 136                         OMAP3_CORE1_IOPAD(0x21ce, PIN_OUTPUT | MUX_MODE0)       /* mcspi1_cs0.mcspi1_cs0 */
 137                 >;
 138         };
 139         hsusb_otg_pins: pinmux_hsusb_otg_pins {
 140                 pinctrl-single,pins = <
 141                         OMAP3_CORE1_IOPAD(0x21a2, PIN_INPUT | MUX_MODE0)        /* hsusb0_clk.hsusb0_clk */
 142                         OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0)       /* hsusb0_stp.hsusb0_stp */
 143                         OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT | MUX_MODE0)        /* hsusb0_dir.hsusb0_dir */
 144                         OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT | MUX_MODE0)        /* hsusb0_nxt.hsusb0_nxt */
 145
 146                         OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT | MUX_MODE0)        /* hsusb0_data0.hsusb0_data0 */
 147                         OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT | MUX_MODE0)        /* hsusb0_data1.hsusb0_data1 */
 148                         OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT | MUX_MODE0)        /* hsusb0_data2.hsusb0_data2 */
 149                         OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT | MUX_MODE0)        /* hsusb0_data3.hsusb0_data3 */
 150                         OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT | MUX_MODE0)        /* hsusb0_data4.hsusb0_data4 */
 151                         OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT | MUX_MODE0)        /* hsusb0_data5.hsusb0_data5 */
 152                         OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT | MUX_MODE0)        /* hsusb0_data6.hsusb0_data6 */
 153                         OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT | MUX_MODE0)        /* hsusb0_data7.hsusb0_data7 */
 154                 >;
 155         };
 156         i2c1_pins: pinmux_i2c1_pins {
 157                 pinctrl-single,pins = <
 158                         OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0)        /* i2c1_scl.i2c1_scl */
 159                         OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0)        /* i2c1_sda.i2c1_sda */
 160                 >;
 161         };
 162         i2c2_pins: pinmux_i2c2_pins {
 163                 pinctrl-single,pins = <
 164                         OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0)        /* i2c2_scl */
 165                         OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0)        /* i2c2_sda */
 166                 >;
 167         };
 168         i2c3_pins: pinmux_i2c3_pins {
 169                 pinctrl-single,pins = <
 170                         OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0)        /* i2c3_scl */
 171                         OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0)        /* i2c3_sda */
 172                 >;
 173         };
 174 };
 175
 176 &uart2 {
 177         interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>;
 178         pinctrl-names = "default";
 179         pinctrl-0 = <&uart2_pins>;
 180 };
 181
 182 &mcspi1 {
 183         pinctrl-names = "default";
 184         pinctrl-0 = <&mcspi1_pins>;
 185 };
 186
 187 #include "twl4030.dtsi"
 188 #include "twl4030_omap3.dtsi"
 189
 190 &twl {
 191         twl_power: power {
 192                 compatible = "ti,twl4030-power-idle-osc-off", "ti,twl4030-power-idle";
 193                 ti,use_poweroff;
 194         };
 195 };
 196
 197 &twl_gpio {
 198         ti,use-leds;
 199 };
 200
 201 &twl_keypad {
 202         status = "disabled";
 203 };