arch/arm/boot/dts/mt7623a-rfb-emmc.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright (c) 2017-2018 MediaTek Inc.
   4  * Author: Sean Wang <sean.wang@mediatek.com>
   5  *
   6  */
   7
   8 /dts-v1/;
   9 #include <dt-bindings/input/input.h>
  10 #include "mt7623a.dtsi"
  11 #include "mt6323.dtsi"
  12
  13 / {
  14         model = "MediaTek MT7623A with eMMC reference board";
  15         compatible = "mediatek,mt7623a-rfb-emmc", "mediatek,mt7623";
  16
  17         aliases {
  18                 serial2 = &uart2;
  19         };
  20
  21         chosen {
  22                 stdout-path = "serial2:115200n8";
  23         };
  24
  25         cpus {
  26                 cpu@0 {
  27                         proc-supply = <&mt6323_vproc_reg>;
  28                 };
  29
  30                 cpu@1 {
  31                         proc-supply = <&mt6323_vproc_reg>;
  32                 };
  33
  34                 cpu@2 {
  35                         proc-supply = <&mt6323_vproc_reg>;
  36                 };
  37
  38                 cpu@3 {
  39                         proc-supply = <&mt6323_vproc_reg>;
  40                 };
  41         };
  42
  43         gpio-keys {
  44                 compatible = "gpio-keys";
  45                 pinctrl-names = "default";
  46                 pinctrl-0 = <&key_pins_a>;
  47
  48                 factory {
  49                         label = "factory";
  50                         linux,code = <BTN_0>;
  51                         gpios = <&pio 256 GPIO_ACTIVE_LOW>;
  52                 };
  53
  54                 wps {
  55                         label = "wps";
  56                         linux,code = <KEY_WPS_BUTTON>;
  57                         gpios = <&pio 257 GPIO_ACTIVE_HIGH>;
  58                 };
  59         };
  60
  61         memory@80000000 {
  62                 device_type = "memory";
  63                 reg = <0 0x80000000 0 0x20000000>;
  64         };
  65
  66         reg_1p8v: regulator-1p8v {
  67                 compatible = "regulator-fixed";
  68                 regulator-name = "fixed-1.8V";
  69                 regulator-min-microvolt = <1800000>;
  70                 regulator-max-microvolt = <1800000>;
  71                 regulator-boot-on;
  72                 regulator-always-on;
  73         };
  74
  75         reg_3p3v: regulator-3p3v {
  76                 compatible = "regulator-fixed";
  77                 regulator-name = "fixed-3.3V";
  78                 regulator-min-microvolt = <3300000>;
  79                 regulator-max-microvolt = <3300000>;
  80                 regulator-boot-on;
  81                 regulator-always-on;
  82         };
  83
  84         reg_5v: regulator-5v {
  85                 compatible = "regulator-fixed";
  86                 regulator-name = "fixed-5V";
  87                 regulator-min-microvolt = <5000000>;
  88                 regulator-max-microvolt = <5000000>;
  89                 regulator-boot-on;
  90                 regulator-always-on;
  91         };
  92
  93         sound {
  94                 compatible = "mediatek,mt2701-wm8960-machine";
  95                 mediatek,platform = <&afe>;
  96                 audio-routing =
  97                         "Headphone", "HP_L",
  98                         "Headphone", "HP_R",
  99                         "LINPUT1", "AMIC",
 100                         "RINPUT1", "AMIC";
 101                 mediatek,audio-codec = <&wm8960>;
 102                 pinctrl-names = "default";
 103                 pinctrl-0 = <&i2s0_pins_a>;
 104         };
 105 };
 106
 107 &btif {
 108         status = "okay";
 109 };
 110
 111 &crypto {
 112         status = "okay";
 113 };
 114
 115 &eth {
 116         status = "okay";
 117
 118         gmac0: mac@0 {
 119                 compatible = "mediatek,eth-mac";
 120                 reg = <0>;
 121                 phy-mode = "trgmii";
 122
 123                 fixed-link {
 124                         speed = <1000>;
 125                         full-duplex;
 126                         pause;
 127                 };
 128         };
 129
 130         mdio-bus {
 131                 #address-cells = <1>;
 132                 #size-cells = <0>;
 133
 134                 switch@0 {
 135                         compatible = "mediatek,mt7530";
 136                         reg = <0>;
 137                         mediatek,mcm;
 138                         resets = <&ethsys MT2701_ETHSYS_MCM_RST>;
 139                         reset-names = "mcm";
 140                         core-supply = <&mt6323_vpa_reg>;
 141                         io-supply = <&mt6323_vemc3v3_reg>;
 142
 143                         ports {
 144                                 #address-cells = <1>;
 145                                 #size-cells = <0>;
 146
 147                                 port@0 {
 148                                         reg = <0>;
 149                                         label = "lan0";
 150                                 };
 151
 152                                 port@1 {
 153                                         reg = <1>;
 154                                         label = "lan1";
 155                                 };
 156
 157                                 port@2 {
 158                                         reg = <2>;
 159                                         label = "lan2";
 160                                 };
 161
 162                                 port@3 {
 163                                         reg = <3>;
 164                                         label = "lan3";
 165                                 };
 166
 167                                 port@4 {
 168                                         reg = <4>;
 169                                         label = "wan";
 170                                 };
 171
 172                                 port@6 {
 173                                         reg = <6>;
 174                                         label = "cpu";
 175                                         ethernet = <&gmac0>;
 176                                         phy-mode = "trgmii";
 177
 178                                         fixed-link {
 179                                                 speed = <1000>;
 180                                                 full-duplex;
 181                                         };
 182                                 };
 183                         };
 184                 };
 185         };
 186 };
 187
 188 &i2c0 {
 189         pinctrl-names = "default";
 190         pinctrl-0 = <&i2c0_pins_a>;
 191         status = "okay";
 192 };
 193
 194 &i2c1 {
 195         pinctrl-names = "default";
 196         pinctrl-0 = <&i2c1_pins_b>;
 197         status = "okay";
 198
 199         wm8960: wm8960@1a {
 200                 compatible = "wlf,wm8960";
 201                 reg = <0x1a>;
 202         };
 203 };
 204
 205 &i2c2 {
 206         pinctrl-names = "default";
 207         pinctrl-0 = <&i2c2_pins_b>;
 208         status = "okay";
 209 };
 210
 211 &mmc0 {
 212         pinctrl-names = "default", "state_uhs";
 213         pinctrl-0 = <&mmc0_pins_default>;
 214         pinctrl-1 = <&mmc0_pins_uhs>;
 215         status = "okay";
 216         bus-width = <8>;
 217         max-frequency = <50000000>;
 218         cap-mmc-highspeed;
 219         vmmc-supply = <&reg_3p3v>;
 220         vqmmc-supply = <&reg_1p8v>;
 221         non-removable;
 222 };
 223
 224 &mmc1 {
 225         pinctrl-names = "default", "state_uhs";
 226         pinctrl-0 = <&mmc1_pins_default>;
 227         pinctrl-1 = <&mmc1_pins_uhs>;
 228         status = "okay";
 229         bus-width = <4>;
 230         max-frequency = <50000000>;
 231         cap-sd-highspeed;
 232         cd-gpios = <&pio 261 GPIO_ACTIVE_LOW>;
 233         vmmc-supply = <&reg_3p3v>;
 234         vqmmc-supply = <&reg_3p3v>;
 235 };
 236
 237 &pcie {
 238         pinctrl-names = "default";
 239         pinctrl-0 = <&pcie_default>;
 240         status = "okay";
 241
 242         pcie@0,0 {
 243                 status = "okay";
 244         };
 245
 246         pcie@1,0 {
 247                 status = "okay";
 248         };
 249 };
 250
 251 &pcie0_phy {
 252         status = "okay";
 253 };
 254
 255 &pcie1_phy {
 256         status = "okay";
 257 };
 258
 259 &pwm {
 260         pinctrl-names = "default";
 261         pinctrl-0 = <&pwm_pins_a>;
 262         status = "okay";
 263 };
 264
 265 &spi0 {
 266         pinctrl-names = "default";
 267         pinctrl-0 = <&spi0_pins_a>;
 268         status = "okay";
 269 };
 270
 271 &spi1 {
 272         pinctrl-names = "default";
 273         pinctrl-0 = <&spi1_pins_a>;
 274         status = "okay";
 275 };
 276
 277 &uart2 {
 278         pinctrl-names = "default";
 279         pinctrl-0 = <&uart2_pins_b>;
 280         status = "okay";
 281 };
 282
 283 &usb1 {
 284         vusb33-supply = <&reg_3p3v>;
 285         vbus-supply = <&reg_5v>;
 286         status = "okay";
 287 };
 288
 289 &u3phy1 {
 290         status = "okay";
 291 };