| blob | 767e0ac0df7c5ec3ed9c01da4afc7e720fd11b47 |
1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2019 Nuvoton Technology <kwliu@nuvoton.com>
3 // Copyright (c) 2019 Quanta Computer Inc. <Samuel.Jiang@quantatw.com>
5 /dts-v1/;
6 #include "nuvoton-npcm750.dtsi"
7 #include "nuvoton-npcm750-runbmc-olympus-pincfg.dtsi"
9 #include <dt-bindings/i2c/i2c.h>
10 #include <dt-bindings/gpio/gpio.h>
12 / {
13 model = "Nuvoton npcm750 RunBMC Olympus";
14 compatible = "nuvoton,npcm750";
16 aliases {
17 ethernet1 = &gmac0;
18 serial0 = &serial0;
19 serial1 = &serial1;
20 serial2 = &serial2;
21 serial3 = &serial3;
22 i2c0 = &i2c0;
23 i2c1 = &i2c1;
24 i2c2 = &i2c2;
25 i2c3 = &i2c3;
26 i2c4 = &i2c4;
27 i2c5 = &i2c5;
28 i2c6 = &i2c6;
29 i2c7 = &i2c7;
30 i2c8 = &i2c8;
31 i2c9 = &i2c9;
32 i2c10 = &i2c10;
33 i2c11 = &i2c11;
34 i2c12 = &i2c12;
35 i2c13 = &i2c13;
36 spi0 = &spi0;
37 spi1 = &spi1;
38 fiu0 = &fiu0;
39 fiu1 = &fiu3;
40 };
42 chosen {
43 stdout-path = &serial3;
44 };
46 memory {
47 reg = <0 0x40000000>;
48 };
50 iio-hwmon {
51 compatible = "iio-hwmon";
52 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
53 <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>;
54 };
56 leds {
57 compatible = "gpio-leds";
58 heartbeat {
59 label = "heartbeat";
60 gpios = <&gpio3 14 1>;
61 };
63 identify {
64 label = "identify";
65 gpios = <&gpio3 15 1>;
66 };
67 };
69 jtag {
70 compatible = "nuvoton,npcm750-jtag";
71 enable_pspi_jtag = <1>;
72 pspi-index = <2>;
73 tck {
74 label = "tck";
75 gpios = <&gpio0 19 0>; /* gpio19 */
76 regbase = <0xf0010000 0x1000>;
77 };
79 tdi {
80 label = "tdi";
81 gpios = <&gpio0 18 0>; /* gpio18 */
82 regbase = <0xf0010000 0x1000>;
83 };
85 tdo {
86 label = "tdo";
87 gpios = <&gpio0 17 0>; /* gpio17 */
88 regbase = <0xf0010000 0x1000>;
89 };
90 tms {
91 label = "tms";
92 gpios = <&gpio0 16 0>; /* gpio16 */
93 regbase = <0xf0010000 0x1000>;
94 };
95 };
96 };
98 &fiu0 {
99 pinctrl-names = "default";
100 pinctrl-0 = <&spi0cs1_pins>;
101 status = "okay";
103 spi-nor@0 {
104 compatible = "jedec,spi-nor";
105 #address-cells = <1>;
106 #size-cells = <1>;
107 reg = <0>;
108 spi-rx-bus-width = <2>;
110 partitions@80000000 {
111 compatible = "fixed-partitions";
112 #address-cells = <1>;
113 #size-cells = <1>;
114 bmc@0{
115 label = "bmc";
116 reg = <0x000000 0x2000000>;
117 };
118 u-boot@0 {
119 label = "u-boot";
120 reg = <0x0000000 0x80000>;
121 read-only;
122 };
123 u-boot-env@100000{
124 label = "u-boot-env";
125 reg = <0x00100000 0x40000>;
126 };
127 kernel@200000 {
128 label = "kernel";
129 reg = <0x0200000 0x600000>;
130 };
131 rofs@800000 {
132 label = "rofs";
133 reg = <0x800000 0x1500000>;
134 };
135 rwfs@1d00000 {
136 label = "rwfs";
137 reg = <0x1d00000 0x300000>;
138 };
139 };
140 };
142 spi-nor@1 {
143 compatible = "jedec,spi-nor";
144 #address-cells = <1>;
145 #size-cells = <1>;
146 reg = <1>;
147 npcm,fiu-rx-bus-width = <2>;
149 partitions@88000000 {
150 compatible = "fixed-partitions";
151 #address-cells = <1>;
152 #size-cells = <1>;
153 spare1@0 {
154 label = "spi0-cs1-spare1";
155 reg = <0x0 0x800000>;
156 };
157 spare2@800000 {
158 label = "spi0-cs1-spare2";
159 reg = <0x800000 0x0>;
160 };
161 };
162 };
163 };
165 &fiu3 {
166 pinctrl-0 = <&spi3_pins>;
167 status = "okay";
169 spi-nor@0 {
170 compatible = "jedec,spi-nor";
171 #address-cells = <1>;
172 #size-cells = <1>;
173 reg = <0>;
174 spi-rx-bus-width = <2>;
176 partitions@A0000000 {
177 compatible = "fixed-partitions";
178 #address-cells = <1>;
179 #size-cells = <1>;
180 system1@0 {
181 label = "spi3-system1";
182 reg = <0x0 0x800000>;
183 };
184 system2@800000 {
185 label = "spi3-system2";
186 reg = <0x800000 0x0>;
187 };
188 };
189 };
190 };
192 &gcr {
193 mux-controller {
194 compatible = "mmio-mux";
195 #mux-control-cells = <1>;
197 mux-reg-masks = <0x38 0x07>;
198 idle-states = <6>;
199 };
200 };
202 &gmac0 {
203 phy-mode = "rgmii-id";
204 snps,eee-force-disable;
205 status = "okay";
206 };
208 &i2c1 {
209 status = "okay";
211 i2c-switch@70 {
212 compatible = "nxp,pca9548";
213 #address-cells = <1>;
214 #size-cells = <0>;
215 reg = <0x70>;
216 i2c-mux-idle-disconnect;
218 i2c_slot1a: i2c-bus@0 {
219 #address-cells = <1>;
220 #size-cells = <0>;
221 reg = <0>;
222 };
224 i2c_slot1b: i2c-bus@1 {
225 #address-cells = <1>;
226 #size-cells = <0>;
227 reg = <1>;
228 };
230 i2c_slot2a: i2c-bus@2 {
231 #address-cells = <1>;
232 #size-cells = <0>;
233 reg = <2>;
234 };
236 i2c_slot2b: i2c-bus@3 {
237 #address-cells = <1>;
238 #size-cells = <0>;
239 reg = <3>;
240 };
242 i2c_slot3: i2c-bus@4 {
243 #address-cells = <1>;
244 #size-cells = <0>;
245 reg = <4>;
246 };
248 i2c_slot4: i2c-bus@5 {
249 #address-cells = <1>;
250 #size-cells = <0>;
251 reg = <5>;
252 };
254 i2c_slot5: i2c-bus@6 {
255 #address-cells = <1>;
256 #size-cells = <0>;
257 reg = <6>;
258 };
259 };
261 i2c-switch@71 {
262 compatible = "nxp,pca9546";
263 reg = <0x71>;
264 #address-cells = <1>;
265 #size-cells = <0>;
266 i2c-mux-idle-disconnect;
268 i2c_m2_s1: i2c-bus@0 {
269 #address-cells = <1>;
270 #size-cells = <0>;
271 reg = <0>;
272 };
274 i2c_m2_s2: i2c-bus@1 {
275 #address-cells = <1>;
276 #size-cells = <0>;
277 reg = <1>;
278 };
279 i2c_m2_s3: i2c-bus@2 {
280 #address-cells = <1>;
281 #size-cells = <0>;
282 reg = <2>;
283 };
285 i2c_m2_s4: i2c-bus@3 {
286 #address-cells = <1>;
287 #size-cells = <0>;
288 reg = <3>;
289 };
290 };
291 };
293 &i2c2 {
294 status = "okay";
296 tmp421@4c {
297 compatible = "ti,tmp421";
298 reg = <0x4c>;
299 };
301 power-supply@58 {
302 compatible = "delta,dps800";
303 reg = <0x58>;
304 };
305 };
307 &i2c3 {
308 status = "okay";
309 };
311 &i2c4 {
312 status = "okay";
314 eeprom@54 {
315 compatible = "atmel,24c64";
316 reg = <0x54>;
317 };
318 };
320 &i2c5 {
321 status = "okay";
323 i2c-slave-mqueue@10 {
324 compatible = "i2c-slave-mqueue";
325 reg = <(I2C_OWN_SLAVE_ADDRESS | 0x10)>;
326 };
327 };
329 &i2c6 {
330 status = "okay";
332 ina219@40 {
333 compatible = "ti,ina219";
334 reg = <0x40>;
335 };
336 ina219@41 {
337 compatible = "ti,ina219";
338 reg = <0x41>;
339 };
340 ina219@44 {
341 compatible = "ti,ina219";
342 reg = <0x44>;
343 };
344 ina219@45 {
345 compatible = "ti,ina219";
346 reg = <0x45>;
347 };
348 tps53679@60 {
349 compatible = "ti,tps53679";
350 reg = <0x60>;
351 };
352 tps53659@62 {
353 compatible = "ti,tps53659";
354 reg = <0x62>;
355 };
356 tps53659@64 {
357 compatible = "ti,tps53659";
358 reg = <0x64>;
359 };
360 tps53622@67 {
361 compatible = "ti,tps53622";
362 reg = <0x67>;
363 };
364 tps53622@69 {
365 compatible = "ti,tps53622";
366 reg = <0x69>;
367 };
368 tps53679@70 {
369 compatible = "ti,tps53679";
370 reg = <0x70>;
371 };
372 tps53659@72 {
373 compatible = "ti,tps53659";
374 reg = <0x72>;
375 };
376 tps53659@74 {
377 compatible = "ti,tps53659";
378 reg = <0x74>;
379 };
380 tps53622@77 {
381 compatible = "ti,tps53622";
382 reg = <0x77>;
383 };
384 };
386 &i2c7 {
387 status = "okay";
389 tmp421@4c {
390 compatible = "ti,tmp421";
391 reg = <0x4c>;
392 };
393 };
395 &i2c8 {
396 status = "okay";
398 adm1278@11 {
399 compatible = "adm1278";
400 reg = <0x11>;
401 Rsense = <500>;
402 };
403 };
405 &i2c9 {
406 status = "okay";
407 };
409 &i2c10 {
410 status = "okay";
412 gpio: pca9555@27 {
413 compatible = "nxp,pca9555";
414 reg = <0x27>;
416 gpio-controller;
417 #gpio-cells = <2>;
418 };
419 };
421 &i2c11 {
422 status = "okay";
424 pca9539_g1a: pca9539-g1a@74 {
425 compatible = "nxp,pca9539";
426 reg = <0x74>;
427 gpio-controller;
428 #gpio-cells = <2>;
429 reset-gpios = <&gpio7 4 GPIO_ACTIVE_LOW>;
430 G1A_P0_0 {
431 gpio-hog;
432 gpios = <0 0>;
433 output-high;
434 line-name = "TPM_BMC_ALERT_N";
435 };
436 G1A_P0_1 {
437 gpio-hog;
438 gpios = <1 0>;
439 input;
440 line-name = "FM_BIOS_TOP_SWAP";
441 };
442 G1A_P0_2 {
443 gpio-hog;
444 gpios = <2 0>;
445 input;
446 line-name = "FM_BIOS_PREFRB2_GOOD";
447 };
448 G1A_P0_3 {
449 gpio-hog;
450 gpios = <3 0>;
451 input;
452 line-name = "BMC_SATAXPCIE_0TO3_SEL";
453 };
454 G1A_P0_4 {
455 gpio-hog;
456 gpios = <4 0>;
457 input;
458 line-name = "BMC_SATAXPCIE_4TO7_SEL";
459 };
460 G1A_P0_5 {
461 gpio-hog;
462 gpios = <5 0>;
463 output-low;
464 line-name = "FM_UV_ADR_TRIGGER_EN_N";
465 };
466 G1A_P0_6 {
467 gpio-hog;
468 gpios = <6 0>;
469 input;
470 line-name = "RM_THROTTLE_EN_N";
471 };
472 G1A_P1_0 {
473 gpio-hog;
474 gpios = <8 0>;
475 input;
476 line-name = "FM_BMC_TPM_PRES_N";
477 };
478 G1A_P1_1 {
479 gpio-hog;
480 gpios = <9 0>;
481 input;
482 line-name = "FM_CPU0_SKTOCC_LVT3_N";
483 };
484 G1A_P1_2 {
485 gpio-hog;
486 gpios = <10 0>;
487 input;
488 line-name = "FM_CPU1_SKTOCC_LVT3_N";
489 };
490 G1A_P1_3 {
491 gpio-hog;
492 gpios = <11 0>;
493 input;
494 line-name = "PSU1_ALERT_N";
495 };
496 G1A_P1_4 {
497 gpio-hog;
498 gpios = <12 0>;
499 input;
500 line-name = "PSU2_ALERT_N";
501 };
502 G1A_P1_5 {
503 gpio-hog;
504 gpios = <13 0>;
505 input;
506 line-name = "H_CPU0_FAST_WAKE_LVT3_N";
507 };
508 G1A_P1_6 {
509 gpio-hog;
510 gpios = <14 0>;
511 output-high;
512 line-name = "I2C_MUX1_RESET_N";
513 };
514 G1A_P1_7 {
515 gpio-hog;
516 gpios = <15 0>;
517 input;
518 line-name = "FM_CPU_CATERR_LVT3_N";
519 };
520 };
522 pca9539_g1b: pca9539-g1b@75 {
523 compatible = "nxp,pca9539";
524 reg = <0x75>;
525 gpio-controller;
526 #gpio-cells = <2>;
527 G1B_P0_0 {
528 gpio-hog;
529 gpios = <0 0>;
530 input;
531 line-name = "PVDDQ_ABC_PINALERT_N";
532 };
533 G1B_P0_1 {
534 gpio-hog;
535 gpios = <1 0>;
536 input;
537 line-name = "PVDDQ_DEF_PINALERT_N";
538 };
539 G1B_P0_2 {
540 gpio-hog;
541 gpios = <2 0>;
542 input;
543 line-name = "PVDDQ_GHJ_PINALERT_N";
544 };
545 G1B_P0_3 {
546 gpio-hog;
547 gpios = <3 0>;
548 input;
549 line-name = "PVDDQ_KLM_PINALERT_N";
550 };
551 G1B_P0_5 {
552 gpio-hog;
553 gpios = <5 0>;
554 input;
555 line-name = "FM_BOARD_REV_ID0";
556 };
557 G1B_P0_6 {
558 gpio-hog;
559 gpios = <6 0>;
560 input;
561 line-name = "FM_BOARD_REV_ID1";
562 };
563 G1B_P0_7 {
564 gpio-hog;
565 gpios = <7 0>;
566 input;
567 line-name = "FM_BOARD_REV_ID2";
568 };
569 G1B_P1_0 {
570 gpio-hog;
571 gpios = <8 0>;
572 input;
573 line-name = "FM_OC_DETECT_EN_N";
574 };
575 G1B_P1_1 {
576 gpio-hog;
577 gpios = <9 0>;
578 input;
579 line-name = "FM_FLASH_DESC_OVERRIDE";
580 };
581 G1B_P1_2 {
582 gpio-hog;
583 gpios = <10 0>;
584 output-low;
585 line-name = "FP_PWR_ID_LED_N";
586 };
587 G1B_P1_3 {
588 gpio-hog;
589 gpios = <11 0>;
590 output-low;
591 line-name = "BMC_LED_PWR_GRN";
592 };
593 G1B_P1_4 {
594 gpio-hog;
595 gpios = <12 0>;
596 output-low;
597 line-name = "BMC_LED_PWR_AMBER";
598 };
599 G1B_P1_5 {
600 gpio-hog;
601 gpios = <13 0>;
602 output-high;
603 line-name = "FM_BMC_FAULT_LED_N";
604 };
605 G1B_P1_6 {
606 gpio-hog;
607 gpios = <14 0>;
608 output-high;
609 line-name = "FM_CPLD_BMC_PWRDN_N";
610 };
611 G1B_P1_7 {
612 gpio-hog;
613 gpios = <15 0>;
614 output-high;
615 line-name = "BMC_LED_CATERR_N";
616 };
617 };
618 };
620 &i2c12 {
621 status = "okay";
623 pca9539_g2a: pca9539-g2a@74 {
624 compatible = "nxp,pca9539";
625 reg = <0x74>;
626 gpio-controller;
627 #gpio-cells = <2>;
628 reset-gpios = <&gpio5 28 GPIO_ACTIVE_LOW>;
629 G2A_P0_0 {
630 gpio-hog;
631 gpios = <0 0>;
632 output-high;
633 line-name = "BMC_PON_RST_REQ_N";
634 };
635 G2A_P0_1 {
636 gpio-hog;
637 gpios = <1 0>;
638 output-high;
639 line-name = "BMC_RST_IND_REQ_N";
640 };
641 G2A_P0_2 {
642 gpio-hog;
643 gpios = <2 0>;
644 input;
645 line-name = "RST_BMC_RTCRST";
646 };
647 G2A_P0_3 {
648 gpio-hog;
649 gpios = <3 0>;
650 output-high;
651 line-name = "FM_BMC_PWRBTN_OUT_N";
652 };
653 G2A_P0_4 {
654 gpio-hog;
655 gpios = <4 0>;
656 output-high;
657 line-name = "RST_BMC_SYSRST_BTN_OUT_N";
658 };
659 G2A_P0_5 {
660 gpio-hog;
661 gpios = <5 0>;
662 output-high;
663 line-name = "FM_BATTERY_SENSE_EN_N";
664 };
665 G2A_P0_6 {
666 gpio-hog;
667 gpios = <6 0>;
668 output-high;
669 line-name = "FM_BMC_READY_N";
670 };
671 G2A_P0_7 {
672 gpio-hog;
673 gpios = <7 0>;
674 input;
675 line-name = "IRQ_BMC_PCH_SMI_LPC_N";
676 };
677 G2A_P1_0 {
678 gpio-hog;
679 gpios = <8 0>;
680 input;
681 line-name = "FM_SLOT4_CFG0";
682 };
683 G2A_P1_1 {
684 gpio-hog;
685 gpios = <9 0>;
686 input;
687 line-name = "FM_SLOT4_CFG1";
688 };
689 G2A_P1_2 {
690 gpio-hog;
691 gpios = <10 0>;
692 input;
693 line-name = "FM_NVDIMM_EVENT_N";
694 };
695 G2A_P1_3 {
696 gpio-hog;
697 gpios = <11 0>;
698 input;
699 line-name = "PSU1_BLADE_EN_N";
700 };
701 G2A_P1_4 {
702 gpio-hog;
703 gpios = <12 0>;
704 input;
705 line-name = "BMC_PCH_FNM";
706 };
707 G2A_P1_5 {
708 gpio-hog;
709 gpios = <13 0>;
710 input;
711 line-name = "FM_SOL_UART_CH_SEL";
712 };
713 G2A_P1_6 {
714 gpio-hog;
715 gpios = <14 0>;
716 input;
717 line-name = "FM_BIOS_POST_CMPLT_N";
718 };
719 };
721 pca9539_g2b: pca9539-g2b@75 {
722 compatible = "nxp,pca9539";
723 reg = <0x75>;
724 gpio-controller;
725 #gpio-cells = <2>;
726 G2B_P0_0 {
727 gpio-hog;
728 gpios = <0 0>;
729 input;
730 line-name = "FM_CPU_MSMI_LVT3_N";
731 };
732 G2B_P0_1 {
733 gpio-hog;
734 gpios = <1 0>;
735 input;
736 line-name = "FM_BIOS_MRC_DEBUG_MSG_DIS";
737 };
738 G2B_P0_2 {
739 gpio-hog;
740 gpios = <2 0>;
741 input;
742 line-name = "FM_CPU1_DISABLE_BMC_N";
743 };
744 G2B_P0_3 {
745 gpio-hog;
746 gpios = <3 0>;
747 output-low;
748 line-name = "BMC_JTAG_SELECT";
749 };
750 G2B_P0_4 {
751 gpio-hog;
752 gpios = <4 0>;
753 output-high;
754 line-name = "PECI_MUX_SELECT";
755 };
756 G2B_P0_5 {
757 gpio-hog;
758 gpios = <5 0>;
759 output-high;
760 line-name = "I2C_MUX2_RESET_N";
761 };
762 G2B_P0_6 {
763 gpio-hog;
764 gpios = <6 0>;
765 input;
766 line-name = "FM_BMC_CPLD_PSU2_ON";
767 };
768 G2B_P0_7 {
769 gpio-hog;
770 gpios = <7 0>;
771 output-high;
772 line-name = "PSU2_ALERT_EN_N";
773 };
774 G2B_P1_0 {
775 gpio-hog;
776 gpios = <8 0>;
777 output-high;
778 line-name = "FM_CPU_BMC_INIT";
779 };
780 G2B_P1_1 {
781 gpio-hog;
782 gpios = <9 0>;
783 output-high;
784 line-name = "IRQ_BMC_PCH_SCI_LPC_N";
785 };
786 G2B_P1_2 {
787 gpio-hog;
788 gpios = <10 0>;
789 output-low;
790 line-name = "PMB_ALERT_EN_N";
791 };
792 G2B_P1_3 {
793 gpio-hog;
794 gpios = <11 0>;
795 output-high;
796 line-name = "FM_FAST_PROCHOT_EN_N";
797 };
798 G2B_P1_4 {
799 gpio-hog;
800 gpios = <12 0>;
801 output-high;
802 line-name = "BMC_NVDIMM_PRSNT_N";
803 };
804 G2B_P1_5 {
805 gpio-hog;
806 gpios = <13 0>;
807 output-low;
808 line-name = "FM_BACKUP_BIOS_SEL_H_BMC";
809 };
810 G2B_P1_6 {
811 gpio-hog;
812 gpios = <14 0>;
813 output-high;
814 line-name = "FM_PWRBRK_N";
815 };
816 };
817 };
819 &i2c13 {
820 status = "okay";
822 tmp75@4a {
823 compatible = "ti,tmp75";
824 reg = <0x4a>;
825 status = "okay";
826 };
827 m24128_fru@51 {
828 compatible = "atmel,24c128";
829 reg = <0x51>;
830 pagesize = <64>;
831 status = "okay";
832 };
833 };
835 &pwm_fan {
836 pinctrl-names = "default";
837 pinctrl-0 = < &pwm0_pins &pwm1_pins
838 &fanin0_pins &fanin1_pins
839 &fanin2_pins &fanin3_pins
840 &fanin4_pins &fanin5_pins
841 &fanin6_pins &fanin7_pins
842 &fanin8_pins &fanin9_pins
843 &fanin10_pins &fanin11_pins>;
844 status = "okay";
846 fan@0 {
847 reg = <0x00>;
848 fan-tach-ch = /bits/ 8 <0x00 0x01>;
849 cooling-levels = <127 255>;
850 };
851 fan@1 {
852 reg = <0x01>;
853 fan-tach-ch = /bits/ 8 <0x02 0x03>;
854 cooling-levels = /bits/ 8 <127 255>;
855 };
856 fan@2 {
857 reg = <0x02>;
858 fan-tach-ch = /bits/ 8 <0x04 0x05>;
859 cooling-levels = /bits/ 8 <127 255>;
860 };
861 fan@3 {
862 reg = <0x03>;
863 fan-tach-ch = /bits/ 8 <0x06 0x07>;
864 cooling-levels = /bits/ 8 <127 255>;
865 };
866 fan@4 {
867 reg = <0x04>;
868 fan-tach-ch = /bits/ 8 <0x08 0x09>;
869 cooling-levels = /bits/ 8 <127 255>;
870 };
871 fan@5 {
872 reg = <0x05>;
873 fan-tach-ch = /bits/ 8 <0x0A 0x0B>;
874 cooling-levels = /bits/ 8 <127 255>;
875 };
876 fan@6 {
877 reg = <0x06>;
878 fan-tach-ch = /bits/ 8 <0x0C 0x0D>;
879 cooling-levels = /bits/ 8 <127 255>;
880 };
881 fan@7 {
882 reg = <0x07>;
883 fan-tach-ch = /bits/ 8 <0x0E 0x0F>;
884 cooling-levels = /bits/ 8 <127 255>;
885 };
886 };
888 &ehci1 {
889 status = "okay";
890 };
892 &watchdog1 {
893 status = "okay";
894 };
896 &rng {
897 status = "okay";
898 };
900 &serial0 {
901 status = "okay";
902 };
904 &serial1 {
905 status = "okay";
906 };
908 &serial2 {
909 status = "okay";
910 };
912 &serial3 {
913 status = "okay";
914 };
916 &adc {
917 #io-channel-cells = <1>;
918 status = "okay";
919 };
921 &kcs1 {
922 status = "okay";
923 };
925 &kcs2 {
926 status = "okay";
927 };
929 &kcs3 {
930 status = "okay";
931 };
933 &spi0 {
934 cs-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
935 status = "okay";
936 };
938 &spi1 {
939 status = "okay";
940 };
942 &pinctrl {
943 pinctrl-names = "default";
944 pinctrl-0 = <
945 /******* RunBMC inside Module pins *******/
946 &gpio0ol_pins
947 &gpio1ol_pins
948 &gpio2ol_pins
949 &gpio3ol_pins
950 &gpio8o_pins
951 &gpio9ol_pins
952 &gpio12ol_pins
953 &gpio13ol_pins
954 &gpio14ol_pins
955 &gpio15ol_pins
956 &gpio37o_pins
957 &gpio38_pins
958 &gpio39_pins
959 &gpio94ol_pins
960 &gpio108ol_pins
961 &gpio109ol_pins
962 &gpio111ol_pins
963 &gpio112ol_pins
964 &gpio113ol_pins
965 &gpio208_pins
966 &gpio209ol_pins
967 &gpio210ol_pins
968 &gpio211ol_pins
969 &gpio212ol_pins
970 &gpio213ol_pins
971 &gpio214ol_pins
972 &gpio215ol_pins
973 &gpio216ol_pins
974 &gpio217ol_pins
975 /******* RunBMC outside Connector pins *******/
976 &gpio5_pins
977 &gpio6_pins
978 &gpio7_pins
979 &gpio10_pins
980 &gpio11_pins
981 &gpio20_pins
982 &gpio21_pins
983 &gpio22o_pins
984 &gpio23_pins
985 &gpio24_pins
986 &gpio25_pins
987 &gpio30_pins
988 &gpio31_pins
989 &gpio40o_pins
990 &gpio59_pins
991 &gpio76_pins
992 &gpio77_pins
993 &gpio78o_pins
994 &gpio79_pins
995 &gpio82_pins
996 &gpio83_pins
997 &gpio84_pins
998 &gpio85o_pins
999 &gpio86ol_pins
1000 &gpio87_pins
1001 &gpio88_pins
1002 &gpio89_pins
1003 &gpio90_pins
1004 &gpio93_pins
1005 &gpio114o_pins
1006 &gpio115_pins
1007 &gpio120_pins
1008 &gpio121_pins
1009 &gpio122_pins
1010 &gpio123_pins
1011 &gpio124_pins
1012 &gpio125_pins
1013 &gpio126_pins
1014 &gpio127o_pins
1015 &gpio136_pins
1016 &gpio137_pins
1017 &gpio138_pins
1018 &gpio139_pins
1019 &gpio140_pins
1020 &gpio141_pins
1021 &gpio142_pins
1022 &gpio143_pins
1023 &gpio144_pins
1024 &gpio146_pins
1025 &gpio145_pins
1026 &gpio147_pins
1027 &gpio153o_pins
1028 &gpio155_pins
1029 &gpio160o_pins
1030 &gpio169o_pins
1031 &gpio188o_pins
1032 &gpio189_pins
1033 &gpio196_pins
1034 &gpio197_pins
1035 &gpio198o_pins
1036 &gpio199o_pins
1037 &gpio200_pins
1038 &gpio202_pins
1039 &gpio203o_pins
1040 &gpio224_pins
1041 &gpio225ol_pins
1042 &gpio226ol_pins
1043 &gpio227ol_pins
1044 &gpio228o_pins
1045 &gpio229o_pins
1046 &gpio230_pins
1047 &gpio231o_pins
1048 &ddc_pins
1049 &wdog1_pins
1050 &wdog2_pins
1051 >;
1052 };