1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2018 Nuvoton Technology tomer.maimon@nuvoton.com
3 // Copyright 2018 Google, Inc.
5 #include "nuvoton-common-npcm7xx.dtsi"
10 interrupt-parent = <&gic>;
15 enable-method = "nuvoton,npcm750-smp";
19 compatible = "arm,cortex-a9";
20 clocks = <&clk NPCM7XX_CLK_CPU>;
21 clock-names = "clk_cpu";
23 next-level-cache = <&l2>;
28 compatible = "arm,cortex-a9";
29 clocks = <&clk NPCM7XX_CLK_CPU>;
30 clock-names = "clk_cpu";
32 next-level-cache = <&l2>;
38 compatible = "arm,cortex-a9-twd-timer";
39 reg = <0x3fe600 0x20>;
40 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
41 IRQ_TYPE_LEVEL_HIGH)>;
42 clocks = <&clk NPCM7XX_CLK_AHB>;
48 device_type = "network";
49 compatible = "snps,dwmac";
50 reg = <0xf0804000 0x2000>;
51 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
52 interrupt-names = "macirq";
54 clocks = <&clk_rg2refck>, <&clk NPCM7XX_CLK_AHB>;
55 clock-names = "stmmaceth", "clk_gmac";
56 pinctrl-names = "default";
57 pinctrl-0 = <&rg2_pins