| blob | 87f0d6dc3e5ac38eb88b9f8ac49420a81d39b865 |
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Device Tree Source for the R-Car M2-W (R8A77910) SoC
4 *
5 * Copyright (C) 2013-2015 Renesas Electronics Corporation
6 * Copyright (C) 2013-2014 Renesas Solutions Corp.
7 * Copyright (C) 2014 Cogent Embedded Inc.
8 */
10 #include <dt-bindings/clock/r8a7791-cpg-mssr.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/power/r8a7791-sysc.h>
15 / {
16 compatible = "renesas,r8a7791";
17 #address-cells = <2>;
18 #size-cells = <2>;
20 aliases {
21 i2c0 = &i2c0;
22 i2c1 = &i2c1;
23 i2c2 = &i2c2;
24 i2c3 = &i2c3;
25 i2c4 = &i2c4;
26 i2c5 = &i2c5;
27 i2c6 = &i2c6;
28 i2c7 = &i2c7;
29 i2c8 = &i2c8;
30 spi0 = &qspi;
31 spi1 = &msiof0;
32 spi2 = &msiof1;
33 spi3 = &msiof2;
34 vin0 = &vin0;
35 vin1 = &vin1;
36 vin2 = &vin2;
37 };
39 /*
40 * The external audio clocks are configured as 0 Hz fixed frequency
41 * clocks by default.
42 * Boards that provide audio clocks should override them.
43 */
44 audio_clk_a: audio_clk_a {
45 compatible = "fixed-clock";
46 #clock-cells = <0>;
47 clock-frequency = <0>;
48 };
49 audio_clk_b: audio_clk_b {
50 compatible = "fixed-clock";
51 #clock-cells = <0>;
52 clock-frequency = <0>;
53 };
54 audio_clk_c: audio_clk_c {
55 compatible = "fixed-clock";
56 #clock-cells = <0>;
57 clock-frequency = <0>;
58 };
60 /* External CAN clock */
61 can_clk: can {
62 compatible = "fixed-clock";
63 #clock-cells = <0>;
64 /* This value must be overridden by the board. */
65 clock-frequency = <0>;
66 };
68 cpus {
69 #address-cells = <1>;
70 #size-cells = <0>;
71 enable-method = "renesas,apmu";
73 cpu0: cpu@0 {
74 device_type = "cpu";
75 compatible = "arm,cortex-a15";
76 reg = <0>;
77 clock-frequency = <1500000000>;
78 clocks = <&cpg CPG_CORE R8A7791_CLK_Z>;
79 power-domains = <&sysc R8A7791_PD_CA15_CPU0>;
80 next-level-cache = <&L2_CA15>;
81 voltage-tolerance = <1>; /* 1% */
82 clock-latency = <300000>; /* 300 us */
84 /* kHz - uV - OPPs unknown yet */
85 operating-points = <1500000 1000000>,
86 <1312500 1000000>,
87 <1125000 1000000>,
88 < 937500 1000000>,
89 < 750000 1000000>,
90 < 375000 1000000>;
91 };
93 cpu1: cpu@1 {
94 device_type = "cpu";
95 compatible = "arm,cortex-a15";
96 reg = <1>;
97 clock-frequency = <1500000000>;
98 clocks = <&cpg CPG_CORE R8A7791_CLK_Z>;
99 power-domains = <&sysc R8A7791_PD_CA15_CPU1>;
100 next-level-cache = <&L2_CA15>;
101 voltage-tolerance = <1>; /* 1% */
102 clock-latency = <300000>; /* 300 us */
104 /* kHz - uV - OPPs unknown yet */
105 operating-points = <1500000 1000000>,
106 <1312500 1000000>,
107 <1125000 1000000>,
108 < 937500 1000000>,
109 < 750000 1000000>,
110 < 375000 1000000>;
111 };
113 L2_CA15: cache-controller-0 {
114 compatible = "cache";
115 power-domains = <&sysc R8A7791_PD_CA15_SCU>;
116 cache-unified;
117 cache-level = <2>;
118 };
119 };
121 /* External root clock */
122 extal_clk: extal {
123 compatible = "fixed-clock";
124 #clock-cells = <0>;
125 /* This value must be overridden by the board. */
126 clock-frequency = <0>;
127 };
129 /* External PCIe clock - can be overridden by the board */
130 pcie_bus_clk: pcie_bus {
131 compatible = "fixed-clock";
132 #clock-cells = <0>;
133 clock-frequency = <0>;
134 };
136 pmu {
137 compatible = "arm,cortex-a15-pmu";
138 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
139 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
140 interrupt-affinity = <&cpu0>, <&cpu1>;
141 };
143 /* External SCIF clock */
144 scif_clk: scif {
145 compatible = "fixed-clock";
146 #clock-cells = <0>;
147 /* This value must be overridden by the board. */
148 clock-frequency = <0>;
149 };
151 soc {
152 compatible = "simple-bus";
153 interrupt-parent = <&gic>;
155 #address-cells = <2>;
156 #size-cells = <2>;
157 ranges;
159 rwdt: watchdog@e6020000 {
160 compatible = "renesas,r8a7791-wdt",
161 "renesas,rcar-gen2-wdt";
162 reg = <0 0xe6020000 0 0x0c>;
163 clocks = <&cpg CPG_MOD 402>;
164 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
165 resets = <&cpg 402>;
166 status = "disabled";
167 };
169 gpio0: gpio@e6050000 {
170 compatible = "renesas,gpio-r8a7791",
171 "renesas,rcar-gen2-gpio";
172 reg = <0 0xe6050000 0 0x50>;
173 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
174 #gpio-cells = <2>;
175 gpio-controller;
176 gpio-ranges = <&pfc 0 0 32>;
177 #interrupt-cells = <2>;
178 interrupt-controller;
179 clocks = <&cpg CPG_MOD 912>;
180 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
181 resets = <&cpg 912>;
182 };
184 gpio1: gpio@e6051000 {
185 compatible = "renesas,gpio-r8a7791",
186 "renesas,rcar-gen2-gpio";
187 reg = <0 0xe6051000 0 0x50>;
188 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
189 #gpio-cells = <2>;
190 gpio-controller;
191 gpio-ranges = <&pfc 0 32 26>;
192 #interrupt-cells = <2>;
193 interrupt-controller;
194 clocks = <&cpg CPG_MOD 911>;
195 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
196 resets = <&cpg 911>;
197 };
199 gpio2: gpio@e6052000 {
200 compatible = "renesas,gpio-r8a7791",
201 "renesas,rcar-gen2-gpio";
202 reg = <0 0xe6052000 0 0x50>;
203 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
204 #gpio-cells = <2>;
205 gpio-controller;
206 gpio-ranges = <&pfc 0 64 32>;
207 #interrupt-cells = <2>;
208 interrupt-controller;
209 clocks = <&cpg CPG_MOD 910>;
210 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
211 resets = <&cpg 910>;
212 };
214 gpio3: gpio@e6053000 {
215 compatible = "renesas,gpio-r8a7791",
216 "renesas,rcar-gen2-gpio";
217 reg = <0 0xe6053000 0 0x50>;
218 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
219 #gpio-cells = <2>;
220 gpio-controller;
221 gpio-ranges = <&pfc 0 96 32>;
222 #interrupt-cells = <2>;
223 interrupt-controller;
224 clocks = <&cpg CPG_MOD 909>;
225 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
226 resets = <&cpg 909>;
227 };
229 gpio4: gpio@e6054000 {
230 compatible = "renesas,gpio-r8a7791",
231 "renesas,rcar-gen2-gpio";
232 reg = <0 0xe6054000 0 0x50>;
233 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
234 #gpio-cells = <2>;
235 gpio-controller;
236 gpio-ranges = <&pfc 0 128 32>;
237 #interrupt-cells = <2>;
238 interrupt-controller;
239 clocks = <&cpg CPG_MOD 908>;
240 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
241 resets = <&cpg 908>;
242 };
244 gpio5: gpio@e6055000 {
245 compatible = "renesas,gpio-r8a7791",
246 "renesas,rcar-gen2-gpio";
247 reg = <0 0xe6055000 0 0x50>;
248 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
249 #gpio-cells = <2>;
250 gpio-controller;
251 gpio-ranges = <&pfc 0 160 32>;
252 #interrupt-cells = <2>;
253 interrupt-controller;
254 clocks = <&cpg CPG_MOD 907>;
255 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
256 resets = <&cpg 907>;
257 };
259 gpio6: gpio@e6055400 {
260 compatible = "renesas,gpio-r8a7791",
261 "renesas,rcar-gen2-gpio";
262 reg = <0 0xe6055400 0 0x50>;
263 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
264 #gpio-cells = <2>;
265 gpio-controller;
266 gpio-ranges = <&pfc 0 192 32>;
267 #interrupt-cells = <2>;
268 interrupt-controller;
269 clocks = <&cpg CPG_MOD 905>;
270 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
271 resets = <&cpg 905>;
272 };
274 gpio7: gpio@e6055800 {
275 compatible = "renesas,gpio-r8a7791",
276 "renesas,rcar-gen2-gpio";
277 reg = <0 0xe6055800 0 0x50>;
278 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
279 #gpio-cells = <2>;
280 gpio-controller;
281 gpio-ranges = <&pfc 0 224 26>;
282 #interrupt-cells = <2>;
283 interrupt-controller;
284 clocks = <&cpg CPG_MOD 904>;
285 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
286 resets = <&cpg 904>;
287 };
289 pfc: pinctrl@e6060000 {
290 compatible = "renesas,pfc-r8a7791";
291 reg = <0 0xe6060000 0 0x250>;
292 };
294 tpu: pwm@e60f0000 {
295 compatible = "renesas,tpu-r8a7791", "renesas,tpu";
296 reg = <0 0xe60f0000 0 0x148>;
297 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
298 clocks = <&cpg CPG_MOD 304>;
299 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
300 resets = <&cpg 304>;
301 #pwm-cells = <3>;
302 status = "disabled";
303 };
305 cpg: clock-controller@e6150000 {
306 compatible = "renesas,r8a7791-cpg-mssr";
307 reg = <0 0xe6150000 0 0x1000>;
308 clocks = <&extal_clk>, <&usb_extal_clk>;
309 clock-names = "extal", "usb_extal";
310 #clock-cells = <2>;
311 #power-domain-cells = <0>;
312 #reset-cells = <1>;
313 };
315 apmu@e6152000 {
316 compatible = "renesas,r8a7791-apmu", "renesas,apmu";
317 reg = <0 0xe6152000 0 0x188>;
318 cpus = <&cpu0 &cpu1>;
319 };
321 rst: reset-controller@e6160000 {
322 compatible = "renesas,r8a7791-rst";
323 reg = <0 0xe6160000 0 0x0100>;
324 };
326 sysc: system-controller@e6180000 {
327 compatible = "renesas,r8a7791-sysc";
328 reg = <0 0xe6180000 0 0x0200>;
329 #power-domain-cells = <1>;
330 };
332 irqc0: interrupt-controller@e61c0000 {
333 compatible = "renesas,irqc-r8a7791", "renesas,irqc";
334 #interrupt-cells = <2>;
335 interrupt-controller;
336 reg = <0 0xe61c0000 0 0x200>;
337 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
338 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
339 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
340 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
341 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
342 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
343 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
344 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
345 <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
346 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
347 clocks = <&cpg CPG_MOD 407>;
348 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
349 resets = <&cpg 407>;
350 };
352 thermal: thermal@e61f0000 {
353 compatible = "renesas,thermal-r8a7791",
354 "renesas,rcar-gen2-thermal",
355 "renesas,rcar-thermal";
356 reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
357 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
358 clocks = <&cpg CPG_MOD 522>;
359 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
360 resets = <&cpg 522>;
361 #thermal-sensor-cells = <0>;
362 };
364 ipmmu_sy0: iommu@e6280000 {
365 compatible = "renesas,ipmmu-r8a7791",
366 "renesas,ipmmu-vmsa";
367 reg = <0 0xe6280000 0 0x1000>;
368 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
369 <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
370 #iommu-cells = <1>;
371 status = "disabled";
372 };
374 ipmmu_sy1: iommu@e6290000 {
375 compatible = "renesas,ipmmu-r8a7791",
376 "renesas,ipmmu-vmsa";
377 reg = <0 0xe6290000 0 0x1000>;
378 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
379 #iommu-cells = <1>;
380 status = "disabled";
381 };
383 ipmmu_ds: iommu@e6740000 {
384 compatible = "renesas,ipmmu-r8a7791",
385 "renesas,ipmmu-vmsa";
386 reg = <0 0xe6740000 0 0x1000>;
387 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
388 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
389 #iommu-cells = <1>;
390 status = "disabled";
391 };
393 ipmmu_mp: iommu@ec680000 {
394 compatible = "renesas,ipmmu-r8a7791",
395 "renesas,ipmmu-vmsa";
396 reg = <0 0xec680000 0 0x1000>;
397 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
398 #iommu-cells = <1>;
399 status = "disabled";
400 };
402 ipmmu_mx: iommu@fe951000 {
403 compatible = "renesas,ipmmu-r8a7791",
404 "renesas,ipmmu-vmsa";
405 reg = <0 0xfe951000 0 0x1000>;
406 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
407 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
408 #iommu-cells = <1>;
409 status = "disabled";
410 };
412 ipmmu_rt: iommu@ffc80000 {
413 compatible = "renesas,ipmmu-r8a7791",
414 "renesas,ipmmu-vmsa";
415 reg = <0 0xffc80000 0 0x1000>;
416 interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
417 #iommu-cells = <1>;
418 status = "disabled";
419 };
421 ipmmu_gp: iommu@e62a0000 {
422 compatible = "renesas,ipmmu-r8a7791",
423 "renesas,ipmmu-vmsa";
424 reg = <0 0xe62a0000 0 0x1000>;
425 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
426 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
427 #iommu-cells = <1>;
428 status = "disabled";
429 };
431 icram0: sram@e63a0000 {
432 compatible = "mmio-sram";
433 reg = <0 0xe63a0000 0 0x12000>;
434 #address-cells = <1>;
435 #size-cells = <1>;
436 ranges = <0 0 0xe63a0000 0x12000>;
437 };
439 icram1: sram@e63c0000 {
440 compatible = "mmio-sram";
441 reg = <0 0xe63c0000 0 0x1000>;
442 #address-cells = <1>;
443 #size-cells = <1>;
444 ranges = <0 0 0xe63c0000 0x1000>;
446 smp-sram@0 {
447 compatible = "renesas,smp-sram";
448 reg = <0 0x100>;
449 };
450 };
452 /* The memory map in the User's Manual maps the cores to
453 * bus numbers
454 */
455 i2c0: i2c@e6508000 {
456 #address-cells = <1>;
457 #size-cells = <0>;
458 compatible = "renesas,i2c-r8a7791",
459 "renesas,rcar-gen2-i2c";
460 reg = <0 0xe6508000 0 0x40>;
461 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
462 clocks = <&cpg CPG_MOD 931>;
463 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
464 resets = <&cpg 931>;
465 i2c-scl-internal-delay-ns = <6>;
466 status = "disabled";
467 };
469 i2c1: i2c@e6518000 {
470 #address-cells = <1>;
471 #size-cells = <0>;
472 compatible = "renesas,i2c-r8a7791",
473 "renesas,rcar-gen2-i2c";
474 reg = <0 0xe6518000 0 0x40>;
475 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
476 clocks = <&cpg CPG_MOD 930>;
477 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
478 resets = <&cpg 930>;
479 i2c-scl-internal-delay-ns = <6>;
480 status = "disabled";
481 };
483 i2c2: i2c@e6530000 {
484 #address-cells = <1>;
485 #size-cells = <0>;
486 compatible = "renesas,i2c-r8a7791",
487 "renesas,rcar-gen2-i2c";
488 reg = <0 0xe6530000 0 0x40>;
489 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
490 clocks = <&cpg CPG_MOD 929>;
491 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
492 resets = <&cpg 929>;
493 i2c-scl-internal-delay-ns = <6>;
494 status = "disabled";
495 };
497 i2c3: i2c@e6540000 {
498 #address-cells = <1>;
499 #size-cells = <0>;
500 compatible = "renesas,i2c-r8a7791",
501 "renesas,rcar-gen2-i2c";
502 reg = <0 0xe6540000 0 0x40>;
503 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
504 clocks = <&cpg CPG_MOD 928>;
505 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
506 resets = <&cpg 928>;
507 i2c-scl-internal-delay-ns = <6>;
508 status = "disabled";
509 };
511 i2c4: i2c@e6520000 {
512 #address-cells = <1>;
513 #size-cells = <0>;
514 compatible = "renesas,i2c-r8a7791",
515 "renesas,rcar-gen2-i2c";
516 reg = <0 0xe6520000 0 0x40>;
517 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
518 clocks = <&cpg CPG_MOD 927>;
519 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
520 resets = <&cpg 927>;
521 i2c-scl-internal-delay-ns = <6>;
522 status = "disabled";
523 };
525 i2c5: i2c@e6528000 {
526 /* doesn't need pinmux */
527 #address-cells = <1>;
528 #size-cells = <0>;
529 compatible = "renesas,i2c-r8a7791",
530 "renesas,rcar-gen2-i2c";
531 reg = <0 0xe6528000 0 0x40>;
532 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
533 clocks = <&cpg CPG_MOD 925>;
534 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
535 resets = <&cpg 925>;
536 i2c-scl-internal-delay-ns = <110>;
537 status = "disabled";
538 };
540 i2c6: i2c@e60b0000 {
541 /* doesn't need pinmux */
542 #address-cells = <1>;
543 #size-cells = <0>;
544 compatible = "renesas,iic-r8a7791",
545 "renesas,rcar-gen2-iic",
546 "renesas,rmobile-iic";
547 reg = <0 0xe60b0000 0 0x425>;
548 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
549 clocks = <&cpg CPG_MOD 926>;
550 dmas = <&dmac0 0x77>, <&dmac0 0x78>,
551 <&dmac1 0x77>, <&dmac1 0x78>;
552 dma-names = "tx", "rx", "tx", "rx";
553 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
554 resets = <&cpg 926>;
555 status = "disabled";
556 };
558 i2c7: i2c@e6500000 {
559 #address-cells = <1>;
560 #size-cells = <0>;
561 compatible = "renesas,iic-r8a7791",
562 "renesas,rcar-gen2-iic",
563 "renesas,rmobile-iic";
564 reg = <0 0xe6500000 0 0x425>;
565 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
566 clocks = <&cpg CPG_MOD 318>;
567 dmas = <&dmac0 0x61>, <&dmac0 0x62>,
568 <&dmac1 0x61>, <&dmac1 0x62>;
569 dma-names = "tx", "rx", "tx", "rx";
570 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
571 resets = <&cpg 318>;
572 status = "disabled";
573 };
575 i2c8: i2c@e6510000 {
576 #address-cells = <1>;
577 #size-cells = <0>;
578 compatible = "renesas,iic-r8a7791",
579 "renesas,rcar-gen2-iic",
580 "renesas,rmobile-iic";
581 reg = <0 0xe6510000 0 0x425>;
582 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
583 clocks = <&cpg CPG_MOD 323>;
584 dmas = <&dmac0 0x65>, <&dmac0 0x66>,
585 <&dmac1 0x65>, <&dmac1 0x66>;
586 dma-names = "tx", "rx", "tx", "rx";
587 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
588 resets = <&cpg 323>;
589 status = "disabled";
590 };
592 hsusb: usb@e6590000 {
593 compatible = "renesas,usbhs-r8a7791",
594 "renesas,rcar-gen2-usbhs";
595 reg = <0 0xe6590000 0 0x100>;
596 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
597 clocks = <&cpg CPG_MOD 704>;
598 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
599 <&usb_dmac1 0>, <&usb_dmac1 1>;
600 dma-names = "ch0", "ch1", "ch2", "ch3";
601 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
602 resets = <&cpg 704>;
603 renesas,buswait = <4>;
604 phys = <&usb0 1>;
605 phy-names = "usb";
606 status = "disabled";
607 };
609 usbphy: usb-phy@e6590100 {
610 compatible = "renesas,usb-phy-r8a7791",
611 "renesas,rcar-gen2-usb-phy";
612 reg = <0 0xe6590100 0 0x100>;
613 #address-cells = <1>;
614 #size-cells = <0>;
615 clocks = <&cpg CPG_MOD 704>;
616 clock-names = "usbhs";
617 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
618 resets = <&cpg 704>;
619 status = "disabled";
621 usb0: usb-channel@0 {
622 reg = <0>;
623 #phy-cells = <1>;
624 };
625 usb2: usb-channel@2 {
626 reg = <2>;
627 #phy-cells = <1>;
628 };
629 };
631 usb_dmac0: dma-controller@e65a0000 {
632 compatible = "renesas,r8a7791-usb-dmac",
633 "renesas,usb-dmac";
634 reg = <0 0xe65a0000 0 0x100>;
635 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
636 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
637 interrupt-names = "ch0", "ch1";
638 clocks = <&cpg CPG_MOD 330>;
639 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
640 resets = <&cpg 330>;
641 #dma-cells = <1>;
642 dma-channels = <2>;
643 };
645 usb_dmac1: dma-controller@e65b0000 {
646 compatible = "renesas,r8a7791-usb-dmac",
647 "renesas,usb-dmac";
648 reg = <0 0xe65b0000 0 0x100>;
649 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
650 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
651 interrupt-names = "ch0", "ch1";
652 clocks = <&cpg CPG_MOD 331>;
653 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
654 resets = <&cpg 331>;
655 #dma-cells = <1>;
656 dma-channels = <2>;
657 };
659 dmac0: dma-controller@e6700000 {
660 compatible = "renesas,dmac-r8a7791",
661 "renesas,rcar-dmac";
662 reg = <0 0xe6700000 0 0x20000>;
663 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
664 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
665 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
666 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
667 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
668 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
669 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
670 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
671 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
672 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
673 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
674 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
675 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
676 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
677 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
678 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
679 interrupt-names = "error",
680 "ch0", "ch1", "ch2", "ch3",
681 "ch4", "ch5", "ch6", "ch7",
682 "ch8", "ch9", "ch10", "ch11",
683 "ch12", "ch13", "ch14";
684 clocks = <&cpg CPG_MOD 219>;
685 clock-names = "fck";
686 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
687 resets = <&cpg 219>;
688 #dma-cells = <1>;
689 dma-channels = <15>;
690 };
692 dmac1: dma-controller@e6720000 {
693 compatible = "renesas,dmac-r8a7791",
694 "renesas,rcar-dmac";
695 reg = <0 0xe6720000 0 0x20000>;
696 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
697 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
698 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
699 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
700 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
701 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
702 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
703 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
704 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
705 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
706 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
707 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
708 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
709 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
710 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
711 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
712 interrupt-names = "error",
713 "ch0", "ch1", "ch2", "ch3",
714 "ch4", "ch5", "ch6", "ch7",
715 "ch8", "ch9", "ch10", "ch11",
716 "ch12", "ch13", "ch14";
717 clocks = <&cpg CPG_MOD 218>;
718 clock-names = "fck";
719 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
720 resets = <&cpg 218>;
721 #dma-cells = <1>;
722 dma-channels = <15>;
723 };
725 avb: ethernet@e6800000 {
726 compatible = "renesas,etheravb-r8a7791",
727 "renesas,etheravb-rcar-gen2";
728 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
729 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
730 clocks = <&cpg CPG_MOD 812>;
731 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
732 resets = <&cpg 812>;
733 #address-cells = <1>;
734 #size-cells = <0>;
735 status = "disabled";
736 };
738 qspi: spi@e6b10000 {
739 compatible = "renesas,qspi-r8a7791", "renesas,qspi";
740 reg = <0 0xe6b10000 0 0x2c>;
741 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
742 clocks = <&cpg CPG_MOD 917>;
743 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
744 <&dmac1 0x17>, <&dmac1 0x18>;
745 dma-names = "tx", "rx", "tx", "rx";
746 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
747 resets = <&cpg 917>;
748 num-cs = <1>;
749 #address-cells = <1>;
750 #size-cells = <0>;
751 status = "disabled";
752 };
754 scifa0: serial@e6c40000 {
755 compatible = "renesas,scifa-r8a7791",
756 "renesas,rcar-gen2-scifa", "renesas,scifa";
757 reg = <0 0xe6c40000 0 64>;
758 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
759 clocks = <&cpg CPG_MOD 204>;
760 clock-names = "fck";
761 dmas = <&dmac0 0x21>, <&dmac0 0x22>,
762 <&dmac1 0x21>, <&dmac1 0x22>;
763 dma-names = "tx", "rx", "tx", "rx";
764 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
765 resets = <&cpg 204>;
766 status = "disabled";
767 };
769 scifa1: serial@e6c50000 {
770 compatible = "renesas,scifa-r8a7791",
771 "renesas,rcar-gen2-scifa", "renesas,scifa";
772 reg = <0 0xe6c50000 0 64>;
773 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
774 clocks = <&cpg CPG_MOD 203>;
775 clock-names = "fck";
776 dmas = <&dmac0 0x25>, <&dmac0 0x26>,
777 <&dmac1 0x25>, <&dmac1 0x26>;
778 dma-names = "tx", "rx", "tx", "rx";
779 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
780 resets = <&cpg 203>;
781 status = "disabled";
782 };
784 scifa2: serial@e6c60000 {
785 compatible = "renesas,scifa-r8a7791",
786 "renesas,rcar-gen2-scifa", "renesas,scifa";
787 reg = <0 0xe6c60000 0 64>;
788 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
789 clocks = <&cpg CPG_MOD 202>;
790 clock-names = "fck";
791 dmas = <&dmac0 0x27>, <&dmac0 0x28>,
792 <&dmac1 0x27>, <&dmac1 0x28>;
793 dma-names = "tx", "rx", "tx", "rx";
794 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
795 resets = <&cpg 202>;
796 status = "disabled";
797 };
799 scifa3: serial@e6c70000 {
800 compatible = "renesas,scifa-r8a7791",
801 "renesas,rcar-gen2-scifa", "renesas,scifa";
802 reg = <0 0xe6c70000 0 64>;
803 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
804 clocks = <&cpg CPG_MOD 1106>;
805 clock-names = "fck";
806 dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
807 <&dmac1 0x1b>, <&dmac1 0x1c>;
808 dma-names = "tx", "rx", "tx", "rx";
809 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
810 resets = <&cpg 1106>;
811 status = "disabled";
812 };
814 scifa4: serial@e6c78000 {
815 compatible = "renesas,scifa-r8a7791",
816 "renesas,rcar-gen2-scifa", "renesas,scifa";
817 reg = <0 0xe6c78000 0 64>;
818 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
819 clocks = <&cpg CPG_MOD 1107>;
820 clock-names = "fck";
821 dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
822 <&dmac1 0x1f>, <&dmac1 0x20>;
823 dma-names = "tx", "rx", "tx", "rx";
824 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
825 resets = <&cpg 1107>;
826 status = "disabled";
827 };
829 scifa5: serial@e6c80000 {
830 compatible = "renesas,scifa-r8a7791",
831 "renesas,rcar-gen2-scifa", "renesas,scifa";
832 reg = <0 0xe6c80000 0 64>;
833 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
834 clocks = <&cpg CPG_MOD 1108>;
835 clock-names = "fck";
836 dmas = <&dmac0 0x23>, <&dmac0 0x24>,
837 <&dmac1 0x23>, <&dmac1 0x24>;
838 dma-names = "tx", "rx", "tx", "rx";
839 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
840 resets = <&cpg 1108>;
841 status = "disabled";
842 };
844 scifb0: serial@e6c20000 {
845 compatible = "renesas,scifb-r8a7791",
846 "renesas,rcar-gen2-scifb", "renesas,scifb";
847 reg = <0 0xe6c20000 0 0x100>;
848 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
849 clocks = <&cpg CPG_MOD 206>;
850 clock-names = "fck";
851 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
852 <&dmac1 0x3d>, <&dmac1 0x3e>;
853 dma-names = "tx", "rx", "tx", "rx";
854 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
855 resets = <&cpg 206>;
856 status = "disabled";
857 };
859 scifb1: serial@e6c30000 {
860 compatible = "renesas,scifb-r8a7791",
861 "renesas,rcar-gen2-scifb", "renesas,scifb";
862 reg = <0 0xe6c30000 0 0x100>;
863 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
864 clocks = <&cpg CPG_MOD 207>;
865 clock-names = "fck";
866 dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
867 <&dmac1 0x19>, <&dmac1 0x1a>;
868 dma-names = "tx", "rx", "tx", "rx";
869 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
870 resets = <&cpg 207>;
871 status = "disabled";
872 };
874 scifb2: serial@e6ce0000 {
875 compatible = "renesas,scifb-r8a7791",
876 "renesas,rcar-gen2-scifb", "renesas,scifb";
877 reg = <0 0xe6ce0000 0 0x100>;
878 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
879 clocks = <&cpg CPG_MOD 216>;
880 clock-names = "fck";
881 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
882 <&dmac1 0x1d>, <&dmac1 0x1e>;
883 dma-names = "tx", "rx", "tx", "rx";
884 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
885 resets = <&cpg 216>;
886 status = "disabled";
887 };
889 scif0: serial@e6e60000 {
890 compatible = "renesas,scif-r8a7791",
891 "renesas,rcar-gen2-scif", "renesas,scif";
892 reg = <0 0xe6e60000 0 64>;
893 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
894 clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
895 <&scif_clk>;
896 clock-names = "fck", "brg_int", "scif_clk";
897 dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
898 <&dmac1 0x29>, <&dmac1 0x2a>;
899 dma-names = "tx", "rx", "tx", "rx";
900 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
901 resets = <&cpg 721>;
902 status = "disabled";
903 };
905 scif1: serial@e6e68000 {
906 compatible = "renesas,scif-r8a7791",
907 "renesas,rcar-gen2-scif", "renesas,scif";
908 reg = <0 0xe6e68000 0 64>;
909 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
910 clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
911 <&scif_clk>;
912 clock-names = "fck", "brg_int", "scif_clk";
913 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
914 <&dmac1 0x2d>, <&dmac1 0x2e>;
915 dma-names = "tx", "rx", "tx", "rx";
916 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
917 resets = <&cpg 720>;
918 status = "disabled";
919 };
921 scif2: serial@e6e58000 {
922 compatible = "renesas,scif-r8a7791",
923 "renesas,rcar-gen2-scif", "renesas,scif";
924 reg = <0 0xe6e58000 0 64>;
925 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
926 clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
927 <&scif_clk>;
928 clock-names = "fck", "brg_int", "scif_clk";
929 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
930 <&dmac1 0x2b>, <&dmac1 0x2c>;
931 dma-names = "tx", "rx", "tx", "rx";
932 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
933 resets = <&cpg 719>;
934 status = "disabled";
935 };
937 scif3: serial@e6ea8000 {
938 compatible = "renesas,scif-r8a7791",
939 "renesas,rcar-gen2-scif", "renesas,scif";
940 reg = <0 0xe6ea8000 0 64>;
941 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
942 clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
943 <&scif_clk>;
944 clock-names = "fck", "brg_int", "scif_clk";
945 dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
946 <&dmac1 0x2f>, <&dmac1 0x30>;
947 dma-names = "tx", "rx", "tx", "rx";
948 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
949 resets = <&cpg 718>;
950 status = "disabled";
951 };
953 scif4: serial@e6ee0000 {
954 compatible = "renesas,scif-r8a7791",
955 "renesas,rcar-gen2-scif", "renesas,scif";
956 reg = <0 0xe6ee0000 0 64>;
957 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
958 clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
959 <&scif_clk>;
960 clock-names = "fck", "brg_int", "scif_clk";
961 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
962 <&dmac1 0xfb>, <&dmac1 0xfc>;
963 dma-names = "tx", "rx", "tx", "rx";
964 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
965 resets = <&cpg 715>;
966 status = "disabled";
967 };
969 scif5: serial@e6ee8000 {
970 compatible = "renesas,scif-r8a7791",
971 "renesas,rcar-gen2-scif", "renesas,scif";
972 reg = <0 0xe6ee8000 0 64>;
973 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
974 clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
975 <&scif_clk>;
976 clock-names = "fck", "brg_int", "scif_clk";
977 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
978 <&dmac1 0xfd>, <&dmac1 0xfe>;
979 dma-names = "tx", "rx", "tx", "rx";
980 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
981 resets = <&cpg 714>;
982 status = "disabled";
983 };
985 hscif0: serial@e62c0000 {
986 compatible = "renesas,hscif-r8a7791",
987 "renesas,rcar-gen2-hscif", "renesas,hscif";
988 reg = <0 0xe62c0000 0 96>;
989 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
990 clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
991 <&scif_clk>;
992 clock-names = "fck", "brg_int", "scif_clk";
993 dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
994 <&dmac1 0x39>, <&dmac1 0x3a>;
995 dma-names = "tx", "rx", "tx", "rx";
996 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
997 resets = <&cpg 717>;
998 status = "disabled";
999 };
1001 hscif1: serial@e62c8000 {
1002 compatible = "renesas,hscif-r8a7791",
1003 "renesas,rcar-gen2-hscif", "renesas,hscif";
1004 reg = <0 0xe62c8000 0 96>;
1005 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
1006 clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
1007 <&scif_clk>;
1008 clock-names = "fck", "brg_int", "scif_clk";
1009 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
1010 <&dmac1 0x4d>, <&dmac1 0x4e>;
1011 dma-names = "tx", "rx", "tx", "rx";
1012 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1013 resets = <&cpg 716>;
1014 status = "disabled";
1015 };
1017 hscif2: serial@e62d0000 {
1018 compatible = "renesas,hscif-r8a7791",
1019 "renesas,rcar-gen2-hscif", "renesas,hscif";
1020 reg = <0 0xe62d0000 0 96>;
1021 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
1022 clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
1023 <&scif_clk>;
1024 clock-names = "fck", "brg_int", "scif_clk";
1025 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
1026 <&dmac1 0x3b>, <&dmac1 0x3c>;
1027 dma-names = "tx", "rx", "tx", "rx";
1028 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1029 resets = <&cpg 713>;
1030 status = "disabled";
1031 };
1033 msiof0: spi@e6e20000 {
1034 compatible = "renesas,msiof-r8a7791",
1035 "renesas,rcar-gen2-msiof";
1036 reg = <0 0xe6e20000 0 0x0064>;
1037 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1038 clocks = <&cpg CPG_MOD 000>;
1039 dmas = <&dmac0 0x51>, <&dmac0 0x52>,
1040 <&dmac1 0x51>, <&dmac1 0x52>;
1041 dma-names = "tx", "rx", "tx", "rx";
1042 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1043 resets = <&cpg 0>;
1044 #address-cells = <1>;
1045 #size-cells = <0>;
1046 status = "disabled";
1047 };
1049 msiof1: spi@e6e10000 {
1050 compatible = "renesas,msiof-r8a7791",
1051 "renesas,rcar-gen2-msiof";
1052 reg = <0 0xe6e10000 0 0x0064>;
1053 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1054 clocks = <&cpg CPG_MOD 208>;
1055 dmas = <&dmac0 0x55>, <&dmac0 0x56>,
1056 <&dmac1 0x55>, <&dmac1 0x56>;
1057 dma-names = "tx", "rx", "tx", "rx";
1058 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1059 resets = <&cpg 208>;
1060 #address-cells = <1>;
1061 #size-cells = <0>;
1062 status = "disabled";
1063 };
1065 msiof2: spi@e6e00000 {
1066 compatible = "renesas,msiof-r8a7791",
1067 "renesas,rcar-gen2-msiof";
1068 reg = <0 0xe6e00000 0 0x0064>;
1069 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1070 clocks = <&cpg CPG_MOD 205>;
1071 dmas = <&dmac0 0x41>, <&dmac0 0x42>,
1072 <&dmac1 0x41>, <&dmac1 0x42>;
1073 dma-names = "tx", "rx", "tx", "rx";
1074 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1075 resets = <&cpg 205>;
1076 #address-cells = <1>;
1077 #size-cells = <0>;
1078 status = "disabled";
1079 };
1081 pwm0: pwm@e6e30000 {
1082 compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar";
1083 reg = <0 0xe6e30000 0 0x8>;
1084 clocks = <&cpg CPG_MOD 523>;
1085 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1086 resets = <&cpg 523>;
1087 #pwm-cells = <2>;
1088 status = "disabled";
1089 };
1091 pwm1: pwm@e6e31000 {
1092 compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar";
1093 reg = <0 0xe6e31000 0 0x8>;
1094 clocks = <&cpg CPG_MOD 523>;
1095 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1096 resets = <&cpg 523>;
1097 #pwm-cells = <2>;
1098 status = "disabled";
1099 };
1101 pwm2: pwm@e6e32000 {
1102 compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar";
1103 reg = <0 0xe6e32000 0 0x8>;
1104 clocks = <&cpg CPG_MOD 523>;
1105 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1106 resets = <&cpg 523>;
1107 #pwm-cells = <2>;
1108 status = "disabled";
1109 };
1111 pwm3: pwm@e6e33000 {
1112 compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar";
1113 reg = <0 0xe6e33000 0 0x8>;
1114 clocks = <&cpg CPG_MOD 523>;
1115 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1116 resets = <&cpg 523>;
1117 #pwm-cells = <2>;
1118 status = "disabled";
1119 };
1121 pwm4: pwm@e6e34000 {
1122 compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar";
1123 reg = <0 0xe6e34000 0 0x8>;
1124 clocks = <&cpg CPG_MOD 523>;
1125 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1126 resets = <&cpg 523>;
1127 #pwm-cells = <2>;
1128 status = "disabled";
1129 };
1131 pwm5: pwm@e6e35000 {
1132 compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar";
1133 reg = <0 0xe6e35000 0 0x8>;
1134 clocks = <&cpg CPG_MOD 523>;
1135 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1136 resets = <&cpg 523>;
1137 #pwm-cells = <2>;
1138 status = "disabled";
1139 };
1141 pwm6: pwm@e6e36000 {
1142 compatible = "renesas,pwm-r8a7791", "renesas,pwm-rcar";
1143 reg = <0 0xe6e36000 0 0x8>;
1144 clocks = <&cpg CPG_MOD 523>;
1145 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1146 resets = <&cpg 523>;
1147 #pwm-cells = <2>;
1148 status = "disabled";
1149 };
1151 adc: adc@e6e54000 {
1152 compatible = "renesas,r8a7791-gyroadc",
1153 "renesas,rcar-gyroadc";
1154 reg = <0 0xe6e54000 0 64>;
1155 clocks = <&cpg CPG_MOD 901>;
1156 clock-names = "fck";
1157 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1158 resets = <&cpg 901>;
1159 status = "disabled";
1160 };
1162 can0: can@e6e80000 {
1163 compatible = "renesas,can-r8a7791",
1164 "renesas,rcar-gen2-can";
1165 reg = <0 0xe6e80000 0 0x1000>;
1166 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1167 clocks = <&cpg CPG_MOD 916>,
1168 <&cpg CPG_CORE R8A7791_CLK_RCAN>, <&can_clk>;
1169 clock-names = "clkp1", "clkp2", "can_clk";
1170 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1171 resets = <&cpg 916>;
1172 status = "disabled";
1173 };
1175 can1: can@e6e88000 {
1176 compatible = "renesas,can-r8a7791",
1177 "renesas,rcar-gen2-can";
1178 reg = <0 0xe6e88000 0 0x1000>;
1179 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1180 clocks = <&cpg CPG_MOD 915>,
1181 <&cpg CPG_CORE R8A7791_CLK_RCAN>, <&can_clk>;
1182 clock-names = "clkp1", "clkp2", "can_clk";
1183 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1184 resets = <&cpg 915>;
1185 status = "disabled";
1186 };
1188 vin0: video@e6ef0000 {
1189 compatible = "renesas,vin-r8a7791",
1190 "renesas,rcar-gen2-vin";
1191 reg = <0 0xe6ef0000 0 0x1000>;
1192 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1193 clocks = <&cpg CPG_MOD 811>;
1194 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1195 resets = <&cpg 811>;
1196 status = "disabled";
1197 };
1199 vin1: video@e6ef1000 {
1200 compatible = "renesas,vin-r8a7791",
1201 "renesas,rcar-gen2-vin";
1202 reg = <0 0xe6ef1000 0 0x1000>;
1203 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1204 clocks = <&cpg CPG_MOD 810>;
1205 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1206 resets = <&cpg 810>;
1207 status = "disabled";
1208 };
1210 vin2: video@e6ef2000 {
1211 compatible = "renesas,vin-r8a7791",
1212 "renesas,rcar-gen2-vin";
1213 reg = <0 0xe6ef2000 0 0x1000>;
1214 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1215 clocks = <&cpg CPG_MOD 809>;
1216 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1217 resets = <&cpg 809>;
1218 status = "disabled";
1219 };
1221 rcar_sound: sound@ec500000 {
1222 /*
1223 * #sound-dai-cells is required
1224 *
1225 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1226 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1227 */
1228 compatible = "renesas,rcar_sound-r8a7791",
1229 "renesas,rcar_sound-gen2";
1230 reg = <0 0xec500000 0 0x1000>, /* SCU */
1231 <0 0xec5a0000 0 0x100>, /* ADG */
1232 <0 0xec540000 0 0x1000>, /* SSIU */
1233 <0 0xec541000 0 0x280>, /* SSI */
1234 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
1235 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1237 clocks = <&cpg CPG_MOD 1005>,
1238 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1239 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1240 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1241 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1242 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1243 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1244 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1245 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1246 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1247 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1248 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1249 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1250 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1251 <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
1252 <&cpg CPG_CORE R8A7791_CLK_M2>;
1253 clock-names = "ssi-all",
1254 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1255 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1256 "ssi.1", "ssi.0", "src.9", "src.8",
1257 "src.7", "src.6", "src.5", "src.4",
1258 "src.3", "src.2", "src.1", "src.0",
1259 "ctu.0", "ctu.1",
1260 "mix.0", "mix.1",
1261 "dvc.0", "dvc.1",
1262 "clk_a", "clk_b", "clk_c", "clk_i";
1263 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1264 resets = <&cpg 1005>,
1265 <&cpg 1006>, <&cpg 1007>,
1266 <&cpg 1008>, <&cpg 1009>,
1267 <&cpg 1010>, <&cpg 1011>,
1268 <&cpg 1012>, <&cpg 1013>,
1269 <&cpg 1014>, <&cpg 1015>;
1270 reset-names = "ssi-all",
1271 "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1272 "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1273 "ssi.1", "ssi.0";
1275 status = "disabled";
1277 rcar_sound,dvc {
1278 dvc0: dvc-0 {
1279 dmas = <&audma1 0xbc>;
1280 dma-names = "tx";
1281 };
1282 dvc1: dvc-1 {
1283 dmas = <&audma1 0xbe>;
1284 dma-names = "tx";
1285 };
1286 };
1288 rcar_sound,mix {
1289 mix0: mix-0 { };
1290 mix1: mix-1 { };
1291 };
1293 rcar_sound,ctu {
1294 ctu00: ctu-0 { };
1295 ctu01: ctu-1 { };
1296 ctu02: ctu-2 { };
1297 ctu03: ctu-3 { };
1298 ctu10: ctu-4 { };
1299 ctu11: ctu-5 { };
1300 ctu12: ctu-6 { };
1301 ctu13: ctu-7 { };
1302 };
1304 rcar_sound,src {
1305 src0: src-0 {
1306 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1307 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1308 dma-names = "rx", "tx";
1309 };
1310 src1: src-1 {
1311 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1312 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1313 dma-names = "rx", "tx";
1314 };
1315 src2: src-2 {
1316 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1317 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1318 dma-names = "rx", "tx";
1319 };
1320 src3: src-3 {
1321 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1322 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1323 dma-names = "rx", "tx";
1324 };
1325 src4: src-4 {
1326 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1327 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1328 dma-names = "rx", "tx";
1329 };
1330 src5: src-5 {
1331 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1332 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1333 dma-names = "rx", "tx";
1334 };
1335 src6: src-6 {
1336 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1337 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1338 dma-names = "rx", "tx";
1339 };
1340 src7: src-7 {
1341 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1342 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1343 dma-names = "rx", "tx";
1344 };
1345 src8: src-8 {
1346 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1347 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1348 dma-names = "rx", "tx";
1349 };
1350 src9: src-9 {
1351 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1352 dmas = <&audma0 0x97>, <&audma1 0xba>;
1353 dma-names = "rx", "tx";
1354 };
1355 };
1357 rcar_sound,ssi {
1358 ssi0: ssi-0 {
1359 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1360 dmas = <&audma0 0x01>, <&audma1 0x02>,
1361 <&audma0 0x15>, <&audma1 0x16>;
1362 dma-names = "rx", "tx", "rxu", "txu";
1363 };
1364 ssi1: ssi-1 {
1365 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1366 dmas = <&audma0 0x03>, <&audma1 0x04>,
1367 <&audma0 0x49>, <&audma1 0x4a>;
1368 dma-names = "rx", "tx", "rxu", "txu";
1369 };
1370 ssi2: ssi-2 {
1371 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1372 dmas = <&audma0 0x05>, <&audma1 0x06>,
1373 <&audma0 0x63>, <&audma1 0x64>;
1374 dma-names = "rx", "tx", "rxu", "txu";
1375 };
1376 ssi3: ssi-3 {
1377 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1378 dmas = <&audma0 0x07>, <&audma1 0x08>,
1379 <&audma0 0x6f>, <&audma1 0x70>;
1380 dma-names = "rx", "tx", "rxu", "txu";
1381 };
1382 ssi4: ssi-4 {
1383 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1384 dmas = <&audma0 0x09>, <&audma1 0x0a>,
1385 <&audma0 0x71>, <&audma1 0x72>;
1386 dma-names = "rx", "tx", "rxu", "txu";
1387 };
1388 ssi5: ssi-5 {
1389 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1390 dmas = <&audma0 0x0b>, <&audma1 0x0c>,
1391 <&audma0 0x73>, <&audma1 0x74>;
1392 dma-names = "rx", "tx", "rxu", "txu";
1393 };
1394 ssi6: ssi-6 {
1395 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1396 dmas = <&audma0 0x0d>, <&audma1 0x0e>,
1397 <&audma0 0x75>, <&audma1 0x76>;
1398 dma-names = "rx", "tx", "rxu", "txu";
1399 };
1400 ssi7: ssi-7 {
1401 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1402 dmas = <&audma0 0x0f>, <&audma1 0x10>,
1403 <&audma0 0x79>, <&audma1 0x7a>;
1404 dma-names = "rx", "tx", "rxu", "txu";
1405 };
1406 ssi8: ssi-8 {
1407 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1408 dmas = <&audma0 0x11>, <&audma1 0x12>,
1409 <&audma0 0x7b>, <&audma1 0x7c>;
1410 dma-names = "rx", "tx", "rxu", "txu";
1411 };
1412 ssi9: ssi-9 {
1413 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1414 dmas = <&audma0 0x13>, <&audma1 0x14>,
1415 <&audma0 0x7d>, <&audma1 0x7e>;
1416 dma-names = "rx", "tx", "rxu", "txu";
1417 };
1418 };
1419 };
1421 audma0: dma-controller@ec700000 {
1422 compatible = "renesas,dmac-r8a7791",
1423 "renesas,rcar-dmac";
1424 reg = <0 0xec700000 0 0x10000>;
1425 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
1426 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
1427 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
1428 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
1429 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
1430 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
1431 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
1432 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
1433 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
1434 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
1435 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
1436 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
1437 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
1438 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
1439 interrupt-names = "error",
1440 "ch0", "ch1", "ch2", "ch3",
1441 "ch4", "ch5", "ch6", "ch7",
1442 "ch8", "ch9", "ch10", "ch11",
1443 "ch12";
1444 clocks = <&cpg CPG_MOD 502>;
1445 clock-names = "fck";
1446 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1447 resets = <&cpg 502>;
1448 #dma-cells = <1>;
1449 dma-channels = <13>;
1450 };
1452 audma1: dma-controller@ec720000 {
1453 compatible = "renesas,dmac-r8a7791",
1454 "renesas,rcar-dmac";
1455 reg = <0 0xec720000 0 0x10000>;
1456 interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
1457 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
1458 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
1459 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
1460 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
1461 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
1462 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
1463 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
1464 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
1465 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
1466 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
1467 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
1468 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
1469 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
1470 interrupt-names = "error",
1471 "ch0", "ch1", "ch2", "ch3",
1472 "ch4", "ch5", "ch6", "ch7",
1473 "ch8", "ch9", "ch10", "ch11",
1474 "ch12";
1475 clocks = <&cpg CPG_MOD 501>;
1476 clock-names = "fck";
1477 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1478 resets = <&cpg 501>;
1479 #dma-cells = <1>;
1480 dma-channels = <13>;
1481 };
1483 xhci: usb@ee000000 {
1484 compatible = "renesas,xhci-r8a7791",
1485 "renesas,rcar-gen2-xhci";
1486 reg = <0 0xee000000 0 0xc00>;
1487 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1488 clocks = <&cpg CPG_MOD 328>;
1489 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1490 resets = <&cpg 328>;
1491 phys = <&usb2 1>;
1492 phy-names = "usb";
1493 status = "disabled";
1494 };
1496 pci0: pci@ee090000 {
1497 compatible = "renesas,pci-r8a7791",
1498 "renesas,pci-rcar-gen2";
1499 device_type = "pci";
1500 reg = <0 0xee090000 0 0xc00>,
1501 <0 0xee080000 0 0x1100>;
1502 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1503 clocks = <&cpg CPG_MOD 703>;
1504 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1505 resets = <&cpg 703>;
1506 status = "disabled";
1508 bus-range = <0 0>;
1509 #address-cells = <3>;
1510 #size-cells = <2>;
1511 #interrupt-cells = <1>;
1512 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1513 interrupt-map-mask = <0xf800 0 0 0x7>;
1514 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
1515 <0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
1516 <0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1518 usb@1,0 {
1519 reg = <0x800 0 0 0 0>;
1520 phys = <&usb0 0>;
1521 phy-names = "usb";
1522 };
1524 usb@2,0 {
1525 reg = <0x1000 0 0 0 0>;
1526 phys = <&usb0 0>;
1527 phy-names = "usb";
1528 };
1529 };
1531 pci1: pci@ee0d0000 {
1532 compatible = "renesas,pci-r8a7791",
1533 "renesas,pci-rcar-gen2";
1534 device_type = "pci";
1535 reg = <0 0xee0d0000 0 0xc00>,
1536 <0 0xee0c0000 0 0x1100>;
1537 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1538 clocks = <&cpg CPG_MOD 703>;
1539 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1540 resets = <&cpg 703>;
1541 status = "disabled";
1543 bus-range = <1 1>;
1544 #address-cells = <3>;
1545 #size-cells = <2>;
1546 #interrupt-cells = <1>;
1547 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1548 interrupt-map-mask = <0xf800 0 0 0x7>;
1549 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
1550 <0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
1551 <0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1553 usb@1,0 {
1554 reg = <0x10800 0 0 0 0>;
1555 phys = <&usb2 0>;
1556 phy-names = "usb";
1557 };
1559 usb@2,0 {
1560 reg = <0x11000 0 0 0 0>;
1561 phys = <&usb2 0>;
1562 phy-names = "usb";
1563 };
1564 };
1566 sdhi0: mmc@ee100000 {
1567 compatible = "renesas,sdhi-r8a7791",
1568 "renesas,rcar-gen2-sdhi";
1569 reg = <0 0xee100000 0 0x328>;
1570 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1571 clocks = <&cpg CPG_MOD 314>;
1572 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
1573 <&dmac1 0xcd>, <&dmac1 0xce>;
1574 dma-names = "tx", "rx", "tx", "rx";
1575 max-frequency = <195000000>;
1576 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1577 resets = <&cpg 314>;
1578 status = "disabled";
1579 };
1581 sdhi1: mmc@ee140000 {
1582 compatible = "renesas,sdhi-r8a7791",
1583 "renesas,rcar-gen2-sdhi";
1584 reg = <0 0xee140000 0 0x100>;
1585 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1586 clocks = <&cpg CPG_MOD 312>;
1587 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
1588 <&dmac1 0xc1>, <&dmac1 0xc2>;
1589 dma-names = "tx", "rx", "tx", "rx";
1590 max-frequency = <97500000>;
1591 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1592 resets = <&cpg 312>;
1593 status = "disabled";
1594 };
1596 sdhi2: mmc@ee160000 {
1597 compatible = "renesas,sdhi-r8a7791",
1598 "renesas,rcar-gen2-sdhi";
1599 reg = <0 0xee160000 0 0x100>;
1600 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1601 clocks = <&cpg CPG_MOD 311>;
1602 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
1603 <&dmac1 0xd3>, <&dmac1 0xd4>;
1604 dma-names = "tx", "rx", "tx", "rx";
1605 max-frequency = <97500000>;
1606 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1607 resets = <&cpg 311>;
1608 status = "disabled";
1609 };
1611 mmcif0: mmc@ee200000 {
1612 compatible = "renesas,mmcif-r8a7791",
1613 "renesas,sh-mmcif";
1614 reg = <0 0xee200000 0 0x80>;
1615 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1616 clocks = <&cpg CPG_MOD 315>;
1617 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
1618 <&dmac1 0xd1>, <&dmac1 0xd2>;
1619 dma-names = "tx", "rx", "tx", "rx";
1620 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1621 resets = <&cpg 315>;
1622 reg-io-width = <4>;
1623 status = "disabled";
1624 max-frequency = <97500000>;
1625 };
1627 sata0: sata@ee300000 {
1628 compatible = "renesas,sata-r8a7791",
1629 "renesas,rcar-gen2-sata";
1630 reg = <0 0xee300000 0 0x200000>;
1631 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
1632 clocks = <&cpg CPG_MOD 815>;
1633 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1634 resets = <&cpg 815>;
1635 status = "disabled";
1636 };
1638 sata1: sata@ee500000 {
1639 compatible = "renesas,sata-r8a7791",
1640 "renesas,rcar-gen2-sata";
1641 reg = <0 0xee500000 0 0x200000>;
1642 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
1643 clocks = <&cpg CPG_MOD 814>;
1644 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1645 resets = <&cpg 814>;
1646 status = "disabled";
1647 };
1649 ether: ethernet@ee700000 {
1650 compatible = "renesas,ether-r8a7791",
1651 "renesas,rcar-gen2-ether";
1652 reg = <0 0xee700000 0 0x400>;
1653 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
1654 clocks = <&cpg CPG_MOD 813>;
1655 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1656 resets = <&cpg 813>;
1657 phy-mode = "rmii";
1658 #address-cells = <1>;
1659 #size-cells = <0>;
1660 status = "disabled";
1661 };
1663 gic: interrupt-controller@f1001000 {
1664 compatible = "arm,gic-400";
1665 #interrupt-cells = <3>;
1666 #address-cells = <0>;
1667 interrupt-controller;
1668 reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
1669 <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
1670 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
1671 clocks = <&cpg CPG_MOD 408>;
1672 clock-names = "clk";
1673 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1674 resets = <&cpg 408>;
1675 };
1677 pciec: pcie@fe000000 {
1678 compatible = "renesas,pcie-r8a7791",
1679 "renesas,pcie-rcar-gen2";
1680 reg = <0 0xfe000000 0 0x80000>;
1681 #address-cells = <3>;
1682 #size-cells = <2>;
1683 bus-range = <0x00 0xff>;
1684 device_type = "pci";
1685 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
1686 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
1687 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
1688 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1689 /* Map all possible DDR as inbound ranges */
1690 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>,
1691 <0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>;
1692 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1693 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1694 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1695 #interrupt-cells = <1>;
1696 interrupt-map-mask = <0 0 0 0>;
1697 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1698 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1699 clock-names = "pcie", "pcie_bus";
1700 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1701 resets = <&cpg 319>;
1702 status = "disabled";
1703 };
1705 vsp@fe928000 {
1706 compatible = "renesas,vsp1";
1707 reg = <0 0xfe928000 0 0x8000>;
1708 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
1709 clocks = <&cpg CPG_MOD 131>;
1710 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1711 resets = <&cpg 131>;
1712 };
1714 vsp@fe930000 {
1715 compatible = "renesas,vsp1";
1716 reg = <0 0xfe930000 0 0x8000>;
1717 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1718 clocks = <&cpg CPG_MOD 128>;
1719 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1720 resets = <&cpg 128>;
1721 };
1723 vsp@fe938000 {
1724 compatible = "renesas,vsp1";
1725 reg = <0 0xfe938000 0 0x8000>;
1726 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
1727 clocks = <&cpg CPG_MOD 127>;
1728 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1729 resets = <&cpg 127>;
1730 };
1732 fdp1@fe940000 {
1733 compatible = "renesas,fdp1";
1734 reg = <0 0xfe940000 0 0x2400>;
1735 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
1736 clocks = <&cpg CPG_MOD 119>;
1737 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1738 resets = <&cpg 119>;
1739 };
1741 fdp1@fe944000 {
1742 compatible = "renesas,fdp1";
1743 reg = <0 0xfe944000 0 0x2400>;
1744 interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
1745 clocks = <&cpg CPG_MOD 118>;
1746 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1747 resets = <&cpg 118>;
1748 };
1750 jpu: jpeg-codec@fe980000 {
1751 compatible = "renesas,jpu-r8a7791",
1752 "renesas,rcar-gen2-jpu";
1753 reg = <0 0xfe980000 0 0x10300>;
1754 interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
1755 clocks = <&cpg CPG_MOD 106>;
1756 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1757 resets = <&cpg 106>;
1758 };
1760 du: display@feb00000 {
1761 compatible = "renesas,du-r8a7791";
1762 reg = <0 0xfeb00000 0 0x40000>;
1763 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1764 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
1765 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
1766 clock-names = "du.0", "du.1";
1767 resets = <&cpg 724>;
1768 reset-names = "du.0";
1769 status = "disabled";
1771 ports {
1772 #address-cells = <1>;
1773 #size-cells = <0>;
1775 port@0 {
1776 reg = <0>;
1777 du_out_rgb: endpoint {
1778 };
1779 };
1780 port@1 {
1781 reg = <1>;
1782 du_out_lvds0: endpoint {
1783 remote-endpoint = <&lvds0_in>;
1784 };
1785 };
1786 };
1787 };
1789 lvds0: lvds@feb90000 {
1790 compatible = "renesas,r8a7791-lvds";
1791 reg = <0 0xfeb90000 0 0x1c>;
1792 clocks = <&cpg CPG_MOD 726>;
1793 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1794 resets = <&cpg 726>;
1795 status = "disabled";
1797 ports {
1798 #address-cells = <1>;
1799 #size-cells = <0>;
1801 port@0 {
1802 reg = <0>;
1803 lvds0_in: endpoint {
1804 remote-endpoint = <&du_out_lvds0>;
1805 };
1806 };
1807 port@1 {
1808 reg = <1>;
1809 lvds0_out: endpoint {
1810 };
1811 };
1812 };
1813 };
1815 prr: chipid@ff000044 {
1816 compatible = "renesas,prr";
1817 reg = <0 0xff000044 0 4>;
1818 };
1820 cmt0: timer@ffca0000 {
1821 compatible = "renesas,r8a7791-cmt0",
1822 "renesas,rcar-gen2-cmt0";
1823 reg = <0 0xffca0000 0 0x1004>;
1824 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
1825 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
1826 clocks = <&cpg CPG_MOD 124>;
1827 clock-names = "fck";
1828 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1829 resets = <&cpg 124>;
1831 status = "disabled";
1832 };
1834 cmt1: timer@e6130000 {
1835 compatible = "renesas,r8a7791-cmt1",
1836 "renesas,rcar-gen2-cmt1";
1837 reg = <0 0xe6130000 0 0x1004>;
1838 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
1839 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
1840 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
1841 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
1842 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
1843 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
1844 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
1845 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
1846 clocks = <&cpg CPG_MOD 329>;
1847 clock-names = "fck";
1848 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
1849 resets = <&cpg 329>;
1851 status = "disabled";
1852 };
1853 };
1855 thermal-zones {
1856 cpu_thermal: cpu-thermal {
1857 polling-delay-passive = <0>;
1858 polling-delay = <0>;
1860 thermal-sensors = <&thermal>;
1862 trips {
1863 cpu-crit {
1864 temperature = <95000>;
1865 hysteresis = <0>;
1866 type = "critical";
1867 };
1868 };
1869 cooling-maps {
1870 };
1871 };
1872 };
1874 timer {
1875 compatible = "arm,armv7-timer";
1876 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1877 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1878 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1879 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
1880 };
1882 /* External USB clock - can be overridden by the board */
1883 usb_extal_clk: usb_extal {
1884 compatible = "fixed-clock";
1885 #clock-cells = <0>;
1886 clock-frequency = <48000000>;
1887 };
1888 };