1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the Alt board
5 * Copyright (C) 2014 Renesas Electronics Corporation
9 #include "r8a7794.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
14 compatible = "renesas,alt", "renesas,r8a7794";
25 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
26 stdout-path = "serial0:115200n8";
30 device_type = "memory";
31 reg = <0 0x40000000 0 0x40000000>;
34 d3_3v: regulator-d3-3v {
35 compatible = "regulator-fixed";
36 regulator-name = "D3.3V";
37 regulator-min-microvolt = <3300000>;
38 regulator-max-microvolt = <3300000>;
43 vcc_sdhi0: regulator-vcc-sdhi0 {
44 compatible = "regulator-fixed";
46 regulator-name = "SDHI0 Vcc";
47 regulator-min-microvolt = <3300000>;
48 regulator-max-microvolt = <3300000>;
50 gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>;
54 vccq_sdhi0: regulator-vccq-sdhi0 {
55 compatible = "regulator-gpio";
57 regulator-name = "SDHI0 VccQ";
58 regulator-min-microvolt = <1800000>;
59 regulator-max-microvolt = <3300000>;
61 gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>;
63 states = <3300000 1>, <1800000 0>;
66 vcc_sdhi1: regulator-vcc-sdhi1 {
67 compatible = "regulator-fixed";
69 regulator-name = "SDHI1 Vcc";
70 regulator-min-microvolt = <3300000>;
71 regulator-max-microvolt = <3300000>;
73 gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>;
77 vccq_sdhi1: regulator-vccq-sdhi1 {
78 compatible = "regulator-gpio";
80 regulator-name = "SDHI1 VccQ";
81 regulator-min-microvolt = <1800000>;
82 regulator-max-microvolt = <3300000>;
84 gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
86 states = <3300000 1>, <1800000 0>;
95 compatible = "adi,adv7123";
103 adv7123_in: endpoint {
104 remote-endpoint = <&du_out_rgb1>;
109 adv7123_out: endpoint {
110 remote-endpoint = <&vga_in>;
117 compatible = "vga-connector";
121 remote-endpoint = <&adv7123_out>;
127 compatible = "fixed-clock";
129 clock-frequency = <74250000>;
133 compatible = "fixed-clock";
135 clock-frequency = <148500000>;
139 #address-cells = <1>;
141 compatible = "i2c-gpio";
143 scl-gpios = <&gpio4 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
144 sda-gpios = <&gpio4 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
148 #address-cells = <1>;
150 compatible = "i2c-gpio";
152 scl-gpios = <&gpio4 8 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
153 sda-gpios = <&gpio4 9 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
154 i2c-gpio,delay-us = <5>;
158 * A fallback to GPIO is provided for I2C1.
161 compatible = "i2c-demux-pinctrl";
162 i2c-parent = <&i2c1>, <&gpioi2c1>;
163 i2c-bus-name = "i2c-hdmi";
164 #address-cells = <1>;
168 compatible = "adi,adv7180";
174 remote-endpoint = <&vin0ep>;
180 compatible = "renesas,r1ex24002", "atmel,24c02";
187 * I2C4 is routed to EXIO connector B, pins 73 (SCL) + 74 (SDA).
188 * A fallback to GPIO is provided.
191 compatible = "i2c-demux-pinctrl";
192 i2c-parent = <&i2c4>, <&gpioi2c4>;
193 i2c-bus-name = "i2c-exio4";
194 #address-cells = <1>;
201 pinctrl-0 = <&usb0_pins>;
202 pinctrl-names = "default";
207 pinctrl-0 = <&usb1_pins>;
208 pinctrl-names = "default";
216 pinctrl-0 = <&du_pins>;
217 pinctrl-names = "default";
220 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
221 <&x13_clk>, <&x2_clk>;
222 clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
227 remote-endpoint = <&adv7123_in>;
234 clock-frequency = <20000000>;
238 pinctrl-0 = <&scif_clk_pins>;
239 pinctrl-names = "default";
242 groups = "du1_rgb666", "du1_sync", "du1_disp", "du1_clk0_out";
247 groups = "scif2_data";
251 scif_clk_pins: scif_clk {
253 function = "scif_clk";
257 groups = "eth_link", "eth_mdio", "eth_rmii";
262 groups = "intc_irq8";
277 groups = "vin0_data8", "vin0_clk";
281 mmcif0_pins: mmcif0 {
282 groups = "mmc_data8", "mmc_ctrl";
287 groups = "sdhi0_data4", "sdhi0_ctrl";
289 power-source = <3300>;
292 sdhi0_pins_uhs: sd0_uhs {
293 groups = "sdhi0_data4", "sdhi0_ctrl";
295 power-source = <1800>;
299 groups = "sdhi1_data4", "sdhi1_ctrl";
301 power-source = <3300>;
304 sdhi1_pins_uhs: sd1_uhs {
305 groups = "sdhi1_data4", "sdhi1_ctrl";
307 power-source = <1800>;
327 groups = "qspi_ctrl", "qspi_data4";
333 pinctrl-0 = <ðer_pins &phy1_pins>;
334 pinctrl-names = "default";
336 phy-handle = <&phy1>;
337 renesas,ether-link-active-low;
340 phy1: ethernet-phy@1 {
342 interrupt-parent = <&irqc0>;
343 interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
344 micrel,led-mode = <1>;
345 reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
350 pinctrl-0 = <&mmcif0_pins>;
351 pinctrl-names = "default";
353 vmmc-supply = <&d3_3v>;
354 vqmmc-supply = <&d3_3v>;
366 pinctrl-0 = <&sdhi0_pins>;
367 pinctrl-1 = <&sdhi0_pins_uhs>;
368 pinctrl-names = "default", "state_uhs";
370 vmmc-supply = <&vcc_sdhi0>;
371 vqmmc-supply = <&vccq_sdhi0>;
372 cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
373 wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
380 pinctrl-0 = <&sdhi1_pins>;
381 pinctrl-1 = <&sdhi1_pins_uhs>;
382 pinctrl-names = "default", "state_uhs";
384 vmmc-supply = <&vcc_sdhi1>;
385 vqmmc-supply = <&vccq_sdhi1>;
386 cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
387 wp-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>;
393 pinctrl-0 = <&i2c1_pins>;
394 pinctrl-names = "i2c-hdmi";
396 clock-frequency = <400000>;
400 pinctrl-0 = <&i2c4_pins>;
401 pinctrl-names = "i2c-exio4";
406 clock-frequency = <100000>;
409 compatible = "dlg,da9063";
411 interrupt-parent = <&gpio3>;
412 interrupts = <31 IRQ_TYPE_LEVEL_LOW>;
413 interrupt-controller;
416 compatible = "dlg,da9063-rtc";
420 compatible = "dlg,da9063-watchdog";
427 pinctrl-0 = <&vin0_pins>;
428 pinctrl-names = "default";
432 remote-endpoint = <&adv7180>;
439 pinctrl-0 = <&scif2_pins>;
440 pinctrl-names = "default";
446 clock-frequency = <14745600>;
450 pinctrl-0 = <&qspi_pins>;
451 pinctrl-names = "default";
456 compatible = "spansion,s25fl512s", "jedec,spi-nor";
458 spi-max-frequency = <30000000>;
459 spi-tx-bus-width = <4>;
460 spi-rx-bus-width = <4>;
466 compatible = "fixed-partitions";
467 #address-cells = <1>;
472 reg = <0x00000000 0x00040000>;
477 reg = <0x00040000 0x00040000>;
482 reg = <0x00080000 0x03f80000>;