1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device tree file for Phytec phyCORE-RK3288 SoM
4 * Copyright (C) 2017 PHYTEC Messtechnik GmbH
5 * Author: Wadim Egorov <w.egorov@phytec.de>
8 #include <dt-bindings/net/ti-dp83867.h>
12 model = "Phytec RK3288 phyCORE";
13 compatible = "phytec,rk3288-phycore-som", "rockchip,rk3288";
16 * Set the minimum memory size here and
17 * let the bootloader set the real size.
20 device_type = "memory";
21 reg = <0x0 0x0 0x0 0x8000000>;
29 ext_gmac: external-gmac-clock {
30 compatible = "fixed-clock";
32 clock-frequency = <125000000>;
33 clock-output-names = "ext_gmac";
37 compatible = "gpio-leds";
38 pinctrl-names = "default";
39 pinctrl-0 = <&user_led_pin>;
43 gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
44 linux,default-trigger = "heartbeat";
45 default-state = "keep";
49 vdd_emmc_io: vdd-emmc-io {
50 compatible = "regulator-fixed";
51 regulator-name = "vdd_emmc_io";
52 regulator-min-microvolt = <1800000>;
53 regulator-max-microvolt = <1800000>;
54 vin-supply = <&vdd_3v3_io>;
57 vdd_in_otg_out: vdd-in-otg-out {
58 compatible = "regulator-fixed";
59 regulator-name = "vdd_in_otg_out";
62 regulator-min-microvolt = <5000000>;
63 regulator-max-microvolt = <5000000>;
66 vdd_misc_1v8: vdd-misc-1v8 {
67 compatible = "regulator-fixed";
68 regulator-name = "vdd_misc_1v8";
71 regulator-min-microvolt = <1800000>;
72 regulator-max-microvolt = <1800000>;
82 pinctrl-names = "default";
83 pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
84 vmmc-supply = <&vdd_3v3_io>;
85 vqmmc-supply = <&vdd_emmc_io>;
89 assigned-clocks = <&cru SCLK_MAC>;
90 assigned-clock-parents = <&ext_gmac>;
91 clock_in_out = "input";
92 pinctrl-names = "default";
93 pinctrl-0 = <&rgmii_pins &phy_rst &phy_int>;
95 phy-supply = <&vdd_eth_2v5>;
96 phy-mode = "rgmii-id";
97 snps,reset-active-low;
98 snps,reset-delays-us = <0 10000 1000000>;
99 snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_HIGH>;
104 compatible = "snps,dwmac-mdio";
105 #address-cells = <1>;
108 phy0: ethernet-phy@0 {
109 compatible = "ethernet-phy-ieee802.3-c22";
111 interrupt-parent = <&gpio4>;
112 interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
113 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
114 ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
115 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
116 enet-phy-lane-no-swap;
117 ti,clk-output-sel = <DP83867_CLK_O_SEL_CHN_A_TCLK>;
123 ddc-i2c-bus = <&i2c5>;
128 sdcard-supply = <&vdd_io_sd>;
129 flash0-supply = <&vdd_emmc_io>;
130 flash1-supply = <&vdd_misc_1v8>;
131 gpio1830-supply = <&vdd_3v3_io>;
132 gpio30-supply = <&vdd_3v3_io>;
133 bb-supply = <&vdd_3v3_io>;
134 dvp-supply = <&vdd_3v3_io>;
135 lcdc-supply = <&vdd_3v3_io>;
136 wifi-supply = <&vdd_3v3_io>;
137 audio-supply = <&vdd_3v3_io>;
142 clock-frequency = <400000>;
145 compatible = "rockchip,rk818";
147 interrupt-parent = <&gpio0>;
148 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
149 pinctrl-names = "default";
150 pinctrl-0 = <&pmic_int>;
151 rockchip,system-power-controller;
155 vcc1-supply = <&vdd_sys>;
156 vcc2-supply = <&vdd_sys>;
157 vcc3-supply = <&vdd_sys>;
158 vcc4-supply = <&vdd_sys>;
159 boost-supply = <&vdd_in_otg_out>;
160 vcc6-supply = <&vdd_sys>;
161 vcc7-supply = <&vdd_misc_1v8>;
162 vcc8-supply = <&vdd_misc_1v8>;
163 vcc9-supply = <&vdd_3v3_io>;
164 vddio-supply = <&vdd_3v3_io>;
168 regulator-name = "vdd_log";
171 regulator-min-microvolt = <1100000>;
172 regulator-max-microvolt = <1100000>;
173 regulator-state-mem {
174 regulator-off-in-suspend;
179 regulator-name = "vdd_gpu";
182 regulator-min-microvolt = <800000>;
183 regulator-max-microvolt = <1250000>;
184 regulator-state-mem {
185 regulator-on-in-suspend;
186 regulator-suspend-microvolt = <1000000>;
191 regulator-name = "vcc_ddr";
194 regulator-state-mem {
195 regulator-on-in-suspend;
199 vdd_3v3_io: DCDC_REG4 {
200 regulator-name = "vdd_3v3_io";
203 regulator-min-microvolt = <3300000>;
204 regulator-max-microvolt = <3300000>;
205 regulator-state-mem {
206 regulator-on-in-suspend;
207 regulator-suspend-microvolt = <3300000>;
211 vdd_sys: DCDC_BOOST {
212 regulator-name = "vdd_sys";
215 regulator-min-microvolt = <5000000>;
216 regulator-max-microvolt = <5000000>;
217 regulator-state-mem {
218 regulator-on-in-suspend;
219 regulator-suspend-microvolt = <5000000>;
225 regulator-name = "vdd_sd";
228 regulator-state-mem {
229 regulator-off-in-suspend;
234 vdd_eth_2v5: LDO_REG2 {
235 regulator-name = "vdd_eth_2v5";
238 regulator-min-microvolt = <2500000>;
239 regulator-max-microvolt = <2500000>;
240 regulator-state-mem {
241 regulator-on-in-suspend;
242 regulator-suspend-microvolt = <2500000>;
248 regulator-name = "vdd_1v0";
251 regulator-min-microvolt = <1000000>;
252 regulator-max-microvolt = <1000000>;
253 regulator-state-mem {
254 regulator-on-in-suspend;
255 regulator-suspend-microvolt = <1000000>;
260 vdd_1v8_lcd_ldo: LDO_REG4 {
261 regulator-name = "vdd_1v8_lcd_ldo";
264 regulator-min-microvolt = <1800000>;
265 regulator-max-microvolt = <1800000>;
266 regulator-state-mem {
267 regulator-on-in-suspend;
268 regulator-suspend-microvolt = <1800000>;
273 vdd_1v0_lcd: LDO_REG6 {
274 regulator-name = "vdd_1v0_lcd";
277 regulator-min-microvolt = <1000000>;
278 regulator-max-microvolt = <1000000>;
279 regulator-state-mem {
280 regulator-on-in-suspend;
281 regulator-suspend-microvolt = <1000000>;
286 vdd_1v8_ldo: LDO_REG7 {
287 regulator-name = "vdd_1v8_ldo";
290 regulator-min-microvolt = <1800000>;
291 regulator-max-microvolt = <1800000>;
292 regulator-state-mem {
293 regulator-off-in-suspend;
294 regulator-suspend-microvolt = <1800000>;
299 vdd_io_sd: LDO_REG9 {
300 regulator-name = "vdd_io_sd";
303 regulator-min-microvolt = <1800000>;
304 regulator-max-microvolt = <3300000>;
305 regulator-state-mem {
306 regulator-off-in-suspend;
313 i2c_eeprom: eeprom@50 {
314 compatible = "atmel,24c32";
319 vdd_cpu: regulator@60 {
320 compatible = "fcs,fan53555";
322 fcs,suspend-voltage-selector = <1>;
325 regulator-enable-ramp-delay = <300>;
326 regulator-name = "vdd_cpu";
327 regulator-min-microvolt = <800000>;
328 regulator-max-microvolt = <1430000>;
329 regulator-ramp-delay = <8000>;
330 vin-supply = <&vdd_sys>;
335 pcfg_output_high: pcfg-output-high {
341 * We run eMMC at max speed; bump up drive strength.
342 * We also have external pulls, so disable the internal ones.
345 rockchip,pins = <3 RK_PC2 2 &pcfg_pull_none_12ma>;
349 rockchip,pins = <3 RK_PC0 2 &pcfg_pull_none_12ma>;
352 emmc_bus8: emmc-bus8 {
353 rockchip,pins = <3 RK_PA0 2 &pcfg_pull_none_12ma>,
354 <3 RK_PA1 2 &pcfg_pull_none_12ma>,
355 <3 RK_PA2 2 &pcfg_pull_none_12ma>,
356 <3 RK_PA3 2 &pcfg_pull_none_12ma>,
357 <3 RK_PA4 2 &pcfg_pull_none_12ma>,
358 <3 RK_PA5 2 &pcfg_pull_none_12ma>,
359 <3 RK_PA6 2 &pcfg_pull_none_12ma>,
360 <3 RK_PA7 2 &pcfg_pull_none_12ma>;
366 rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
370 rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_output_high>;
375 user_led_pin: user-led-pin {
376 rockchip,pins = <7 RK_PA2 RK_FUNC_GPIO &pcfg_output_high>;
382 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
385 /* Pin for switching state between sleep and non-sleep state */
386 pmic_sleep: pmic-sleep {
387 rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
398 vref-supply = <&vdd_1v8_ldo>;
404 serial_flash: flash@0 {
405 compatible = "micron,n25q128a13", "jedec,spi-nor";
407 spi-max-frequency = <50000000>;
409 #address-cells = <1>;
417 rockchip,hw-tshut-mode = <0>;
418 rockchip,hw-tshut-polarity = <0>;