1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Google Veyron (and derivatives) board device tree source
4 * Chromebook specific parts
6 * Copyright 2015 Google, Inc
9 #include <dt-bindings/clock/rockchip,rk808.h>
10 #include <dt-bindings/input/input.h>
11 #include "rk3288-veyron.dtsi"
12 #include "rk3288-veyron-analog-audio.dtsi"
13 #include "rk3288-veyron-edp.dtsi"
14 #include "rk3288-veyron-sdmmc.dtsi"
18 /* Assign 20 so we don't get confused w/ builtin ones */
23 compatible = "gpio-charger";
24 charger-type = "mains";
25 gpios = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
26 pinctrl-names = "default";
27 pinctrl-0 = <&ac_present_ap>;
30 lid_switch: lid-switch {
31 compatible = "gpio-keys";
32 pinctrl-names = "default";
33 pinctrl-0 = <&ap_lid_int_l>;
37 gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>;
39 linux,code = <SW_LID>;
40 linux,input-type = <EV_SW>;
41 debounce-interval = <1>;
45 /* A non-regulated voltage from power supply or battery */
47 compatible = "regulator-fixed";
48 regulator-name = "vccsys";
53 vcc33_sys: vcc33-sys {
54 vin-supply = <&vccsys>;
58 vin-supply = <&vccsys>;
61 /* This turns on vbus for host1 (dwc2) */
62 vcc5_host1: vcc5-host1-regulator {
63 compatible = "regulator-fixed";
65 gpio = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
66 pinctrl-names = "default";
67 pinctrl-0 = <&host1_pwr_en>;
68 regulator-name = "vcc5_host1";
73 /* This turns on vbus for otg for host mode (dwc2) */
74 vcc5v_otg: vcc5v-otg-regulator {
75 compatible = "regulator-fixed";
77 gpio = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
78 pinctrl-names = "default";
79 pinctrl-0 = <&usbotg_pwren_h>;
80 regulator-name = "vcc5_host2";
87 vcc11-supply = <&vcc_5v>;
91 regulator-name = "vcc33_ccd";
94 regulator-min-microvolt = <3300000>;
95 regulator-max-microvolt = <3300000>;
97 regulator-off-in-suspend;
107 compatible = "google,cros-ec-spi";
109 google,cros-ec-spi-pre-delay = <30>;
110 interrupt-parent = <&gpio7>;
111 interrupts = <RK_PA7 IRQ_TYPE_LEVEL_LOW>;
112 pinctrl-names = "default";
113 pinctrl-0 = <&ec_int>;
114 spi-max-frequency = <3000000>;
116 i2c_tunnel: i2c-tunnel {
117 compatible = "google,cros-ec-i2c-tunnel";
118 google,remote-bus = <0>;
119 #address-cells = <1>;
127 compatible = "elan,ekth3000";
129 interrupt-parent = <&gpio7>;
130 interrupts = <RK_PA3 IRQ_TYPE_EDGE_FALLING>;
131 pinctrl-names = "default";
132 pinctrl-0 = <&trackpad_int>;
133 vcc-supply = <&vcc33_io>;
140 ap_lid_int_l: ap-lid-int-l {
141 rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;
146 ac_present_ap: ac-present-ap {
147 rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
153 rockchip,pins = <7 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
158 suspend_l_wake: suspend-l-wake {
159 rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_output_low>;
162 suspend_l_sleep: suspend-l-sleep {
163 rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_output_high>;
168 trackpad_int: trackpad-int {
169 rockchip,pins = <7 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
174 host1_pwr_en: host1-pwr-en {
175 rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
178 usbotg_pwren_h: usbotg-pwren-h {
179 rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
184 #include "cros-ec-keyboard.dtsi"