| blob | 05c55875835d54829015ea865fb75d5277261b02 |
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * sama5d4.dtsi - Device Tree Include file for SAMA5D4 family SoC
4 *
5 * Copyright (C) 2014 Atmel,
6 * 2014 Nicolas Ferre <nicolas.ferre@atmel.com>
7 */
9 #include <dt-bindings/clock/at91.h>
10 #include <dt-bindings/dma/at91.h>
11 #include <dt-bindings/pinctrl/at91.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/gpio/gpio.h>
15 / {
16 #address-cells = <1>;
17 #size-cells = <1>;
18 model = "Atmel SAMA5D4 family SoC";
19 compatible = "atmel,sama5d4";
20 interrupt-parent = <&aic>;
22 aliases {
23 serial0 = &usart3;
24 serial1 = &usart4;
25 serial2 = &usart2;
26 serial3 = &usart0;
27 serial4 = &usart1;
28 serial5 = &uart0;
29 serial6 = &uart1;
30 gpio0 = &pioA;
31 gpio1 = &pioB;
32 gpio2 = &pioC;
33 gpio3 = &pioD;
34 gpio4 = &pioE;
35 pwm0 = &pwm0;
36 ssc0 = &ssc0;
37 ssc1 = &ssc1;
38 tcb0 = &tcb0;
39 tcb1 = &tcb1;
40 i2c0 = &i2c0;
41 i2c1 = &i2c1;
42 i2c2 = &i2c2;
43 };
44 cpus {
45 #address-cells = <1>;
46 #size-cells = <0>;
48 cpu@0 {
49 device_type = "cpu";
50 compatible = "arm,cortex-a5";
51 reg = <0>;
52 next-level-cache = <&L2>;
53 };
54 };
56 memory@20000000 {
57 device_type = "memory";
58 reg = <0x20000000 0x20000000>;
59 };
61 clocks {
62 slow_xtal: slow_xtal {
63 compatible = "fixed-clock";
64 #clock-cells = <0>;
65 clock-frequency = <0>;
66 };
68 main_xtal: main_xtal {
69 compatible = "fixed-clock";
70 #clock-cells = <0>;
71 clock-frequency = <0>;
72 };
74 adc_op_clk: adc_op_clk{
75 compatible = "fixed-clock";
76 #clock-cells = <0>;
77 clock-frequency = <1000000>;
78 };
79 };
81 ns_sram: sram@210000 {
82 compatible = "mmio-sram";
83 reg = <0x00210000 0x10000>;
84 #address-cells = <1>;
85 #size-cells = <1>;
86 ranges = <0 0x00210000 0x10000>;
87 };
89 ahb {
90 compatible = "simple-bus";
91 #address-cells = <1>;
92 #size-cells = <1>;
93 ranges;
95 nfc_sram: sram@100000 {
96 compatible = "mmio-sram";
97 no-memory-wc;
98 reg = <0x100000 0x2400>;
99 #address-cells = <1>;
100 #size-cells = <1>;
101 ranges = <0 0x100000 0x2400>;
102 };
104 usb0: gadget@400000 {
105 compatible = "atmel,sama5d3-udc";
106 reg = <0x00400000 0x100000
107 0xfc02c000 0x4000>;
108 interrupts = <47 IRQ_TYPE_LEVEL_HIGH 2>;
109 clocks = <&pmc PMC_TYPE_PERIPHERAL 47>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
110 clock-names = "pclk", "hclk";
111 status = "disabled";
112 };
114 usb1: ohci@500000 {
115 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
116 reg = <0x00500000 0x100000>;
117 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 2>;
118 clocks = <&pmc PMC_TYPE_PERIPHERAL 46>, <&pmc PMC_TYPE_PERIPHERAL 46>, <&pmc PMC_TYPE_SYSTEM 6>;
119 clock-names = "ohci_clk", "hclk", "uhpck";
120 status = "disabled";
121 };
123 usb2: ehci@600000 {
124 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
125 reg = <0x00600000 0x100000>;
126 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 2>;
127 clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 46>;
128 clock-names = "usb_clk", "ehci_clk";
129 status = "disabled";
130 };
132 L2: cache-controller@a00000 {
133 compatible = "arm,pl310-cache";
134 reg = <0x00a00000 0x1000>;
135 interrupts = <67 IRQ_TYPE_LEVEL_HIGH 4>;
136 cache-unified;
137 cache-level = <2>;
138 };
140 ebi: ebi@10000000 {
141 compatible = "atmel,sama5d3-ebi";
142 #address-cells = <2>;
143 #size-cells = <1>;
144 atmel,smc = <&hsmc>;
145 reg = <0x10000000 0x10000000
146 0x60000000 0x28000000>;
147 ranges = <0x0 0x0 0x10000000 0x10000000
148 0x1 0x0 0x60000000 0x10000000
149 0x2 0x0 0x70000000 0x10000000
150 0x3 0x0 0x80000000 0x8000000>;
151 clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
152 status = "disabled";
154 nand_controller: nand-controller {
155 compatible = "atmel,sama5d3-nand-controller";
156 atmel,nfc-sram = <&nfc_sram>;
157 atmel,nfc-io = <&nfc_io>;
158 ecc-engine = <&pmecc>;
159 #address-cells = <2>;
160 #size-cells = <1>;
161 ranges;
162 status = "disabled";
163 };
164 };
166 nfc_io: nfc-io@90000000 {
167 compatible = "atmel,sama5d3-nfc-io", "syscon";
168 reg = <0x90000000 0x8000000>;
169 };
171 apb {
172 compatible = "simple-bus";
173 #address-cells = <1>;
174 #size-cells = <1>;
175 ranges;
177 hlcdc: hlcdc@f0000000 {
178 compatible = "atmel,sama5d4-hlcdc";
179 reg = <0xf0000000 0x4000>;
180 interrupts = <51 IRQ_TYPE_LEVEL_HIGH 0>;
181 clocks = <&pmc PMC_TYPE_PERIPHERAL 51>, <&pmc PMC_TYPE_SYSTEM 3>, <&clk32k>;
182 clock-names = "periph_clk","sys_clk", "slow_clk";
183 status = "disabled";
185 hlcdc-display-controller {
186 compatible = "atmel,hlcdc-display-controller";
187 #address-cells = <1>;
188 #size-cells = <0>;
190 port@0 {
191 #address-cells = <1>;
192 #size-cells = <0>;
193 reg = <0>;
194 };
195 };
197 hlcdc_pwm: hlcdc-pwm {
198 compatible = "atmel,hlcdc-pwm";
199 pinctrl-names = "default";
200 pinctrl-0 = <&pinctrl_lcd_pwm>;
201 #pwm-cells = <3>;
202 };
203 };
205 dma1: dma-controller@f0004000 {
206 compatible = "atmel,sama5d4-dma";
207 reg = <0xf0004000 0x200>;
208 interrupts = <50 IRQ_TYPE_LEVEL_HIGH 0>;
209 #dma-cells = <1>;
210 clocks = <&pmc PMC_TYPE_PERIPHERAL 50>;
211 clock-names = "dma_clk";
212 };
214 isi: isi@f0008000 {
215 compatible = "atmel,at91sam9g45-isi";
216 reg = <0xf0008000 0x4000>;
217 interrupts = <52 IRQ_TYPE_LEVEL_HIGH 5>;
218 pinctrl-names = "default";
219 pinctrl-0 = <&pinctrl_isi_data_0_7>;
220 clocks = <&pmc PMC_TYPE_PERIPHERAL 52>;
221 clock-names = "isi_clk";
222 status = "disabled";
223 port {
224 #address-cells = <1>;
225 #size-cells = <0>;
226 };
227 };
229 ramc0: ramc@f0010000 {
230 compatible = "atmel,sama5d3-ddramc";
231 reg = <0xf0010000 0x200>;
232 clocks = <&pmc PMC_TYPE_SYSTEM 2>, <&pmc PMC_TYPE_PERIPHERAL 16>;
233 clock-names = "ddrck", "mpddr";
234 };
236 dma0: dma-controller@f0014000 {
237 compatible = "atmel,sama5d4-dma";
238 reg = <0xf0014000 0x200>;
239 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 0>;
240 #dma-cells = <1>;
241 clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
242 clock-names = "dma_clk";
243 };
245 pmc: pmc@f0018000 {
246 compatible = "atmel,sama5d4-pmc", "syscon";
247 reg = <0xf0018000 0x120>;
248 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
249 #clock-cells = <2>;
250 clocks = <&clk32k>, <&main_xtal>;
251 clock-names = "slow_clk", "main_xtal";
252 };
254 mmc0: mmc@f8000000 {
255 compatible = "atmel,hsmci";
256 reg = <0xf8000000 0x600>;
257 interrupts = <35 IRQ_TYPE_LEVEL_HIGH 0>;
258 dmas = <&dma1
259 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
260 | AT91_XDMAC_DT_PERID(0))>;
261 dma-names = "rxtx";
262 pinctrl-names = "default";
263 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3>;
264 status = "disabled";
265 #address-cells = <1>;
266 #size-cells = <0>;
267 clocks = <&pmc PMC_TYPE_PERIPHERAL 35>;
268 clock-names = "mci_clk";
269 };
271 uart0: serial@f8004000 {
272 compatible = "atmel,at91sam9260-usart";
273 reg = <0xf8004000 0x100>;
274 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 5>;
275 dmas = <&dma0
276 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
277 | AT91_XDMAC_DT_PERID(22))>,
278 <&dma0
279 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
280 | AT91_XDMAC_DT_PERID(23))>;
281 dma-names = "tx", "rx";
282 pinctrl-names = "default";
283 pinctrl-0 = <&pinctrl_uart0>;
284 clocks = <&pmc PMC_TYPE_PERIPHERAL 27>;
285 clock-names = "usart";
286 status = "disabled";
287 };
289 ssc0: ssc@f8008000 {
290 compatible = "atmel,at91sam9g45-ssc";
291 reg = <0xf8008000 0x4000>;
292 interrupts = <48 IRQ_TYPE_LEVEL_HIGH 0>;
293 pinctrl-names = "default";
294 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
295 dmas = <&dma1
296 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
297 | AT91_XDMAC_DT_PERID(26))>,
298 <&dma1
299 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
300 | AT91_XDMAC_DT_PERID(27))>;
301 dma-names = "tx", "rx";
302 clocks = <&pmc PMC_TYPE_PERIPHERAL 48>;
303 clock-names = "pclk";
304 status = "disabled";
305 };
307 pwm0: pwm@f800c000 {
308 compatible = "atmel,sama5d3-pwm";
309 reg = <0xf800c000 0x300>;
310 interrupts = <43 IRQ_TYPE_LEVEL_HIGH 4>;
311 #pwm-cells = <3>;
312 clocks = <&pmc PMC_TYPE_PERIPHERAL 43>;
313 status = "disabled";
314 };
316 spi0: spi@f8010000 {
317 #address-cells = <1>;
318 #size-cells = <0>;
319 compatible = "atmel,at91rm9200-spi";
320 reg = <0xf8010000 0x100>;
321 interrupts = <37 IRQ_TYPE_LEVEL_HIGH 3>;
322 dmas = <&dma1
323 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
324 | AT91_XDMAC_DT_PERID(10))>,
325 <&dma1
326 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
327 | AT91_XDMAC_DT_PERID(11))>;
328 dma-names = "tx", "rx";
329 pinctrl-names = "default";
330 pinctrl-0 = <&pinctrl_spi0>;
331 clocks = <&pmc PMC_TYPE_PERIPHERAL 37>;
332 clock-names = "spi_clk";
333 status = "disabled";
334 };
336 i2c0: i2c@f8014000 {
337 compatible = "atmel,sama5d4-i2c";
338 reg = <0xf8014000 0x4000>;
339 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 6>;
340 dmas = <&dma1
341 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
342 | AT91_XDMAC_DT_PERID(2))>,
343 <&dma1
344 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
345 | AT91_XDMAC_DT_PERID(3))>;
346 dma-names = "tx", "rx";
347 pinctrl-names = "default", "gpio";
348 pinctrl-0 = <&pinctrl_i2c0>;
349 pinctrl-1 = <&pinctrl_i2c0_gpio>;
350 sda-gpios = <&pioA 30 GPIO_ACTIVE_HIGH>;
351 scl-gpios = <&pioA 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
352 #address-cells = <1>;
353 #size-cells = <0>;
354 clocks = <&pmc PMC_TYPE_PERIPHERAL 32>;
355 status = "disabled";
356 };
358 i2c1: i2c@f8018000 {
359 compatible = "atmel,sama5d4-i2c";
360 reg = <0xf8018000 0x4000>;
361 interrupts = <33 IRQ_TYPE_LEVEL_HIGH 6>;
362 dmas = <&dma0
363 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
364 | AT91_XDMAC_DT_PERID(4))>,
365 <&dma0
366 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
367 | AT91_XDMAC_DT_PERID(5))>;
368 dma-names = "tx", "rx";
369 pinctrl-names = "default", "gpio";
370 pinctrl-0 = <&pinctrl_i2c1>;
371 pinctrl-1 = <&pinctrl_i2c1_gpio>;
372 sda-gpios = <&pioE 29 GPIO_ACTIVE_HIGH>;
373 scl-gpios = <&pioE 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
374 #address-cells = <1>;
375 #size-cells = <0>;
376 clocks = <&pmc PMC_TYPE_PERIPHERAL 33>;
377 status = "disabled";
378 };
380 tcb0: timer@f801c000 {
381 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
382 #address-cells = <1>;
383 #size-cells = <0>;
384 reg = <0xf801c000 0x100>;
385 interrupts = <40 IRQ_TYPE_LEVEL_HIGH 0>;
386 clocks = <&pmc PMC_TYPE_PERIPHERAL 40>, <&clk32k>;
387 clock-names = "t0_clk", "slow_clk";
388 };
390 macb0: ethernet@f8020000 {
391 compatible = "atmel,sama5d4-gem";
392 reg = <0xf8020000 0x100>;
393 interrupts = <54 IRQ_TYPE_LEVEL_HIGH 3>;
394 pinctrl-names = "default";
395 pinctrl-0 = <&pinctrl_macb0_rmii>;
396 #address-cells = <1>;
397 #size-cells = <0>;
398 clocks = <&pmc PMC_TYPE_PERIPHERAL 54>, <&pmc PMC_TYPE_PERIPHERAL 54>;
399 clock-names = "hclk", "pclk";
400 status = "disabled";
401 };
403 i2c2: i2c@f8024000 {
404 compatible = "atmel,sama5d4-i2c";
405 reg = <0xf8024000 0x4000>;
406 interrupts = <34 IRQ_TYPE_LEVEL_HIGH 6>;
407 dmas = <&dma1
408 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
409 | AT91_XDMAC_DT_PERID(6))>,
410 <&dma1
411 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
412 | AT91_XDMAC_DT_PERID(7))>;
413 dma-names = "tx", "rx";
414 pinctrl-names = "default", "gpio";
415 pinctrl-0 = <&pinctrl_i2c2>;
416 pinctrl-1 = <&pinctrl_i2c2_gpio>;
417 sda-gpios = <&pioB 29 GPIO_ACTIVE_HIGH>;
418 scl-gpios = <&pioB 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
419 #address-cells = <1>;
420 #size-cells = <0>;
421 clocks = <&pmc PMC_TYPE_PERIPHERAL 34>;
422 status = "disabled";
423 };
425 sfr: sfr@f8028000 {
426 compatible = "atmel,sama5d4-sfr", "syscon";
427 reg = <0xf8028000 0x60>;
428 };
430 usart0: serial@f802c000 {
431 compatible = "atmel,at91sam9260-usart";
432 reg = <0xf802c000 0x100>;
433 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
434 dmas = <&dma0
435 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
436 | AT91_XDMAC_DT_PERID(36))>,
437 <&dma0
438 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
439 | AT91_XDMAC_DT_PERID(37))>;
440 dma-names = "tx", "rx";
441 pinctrl-names = "default";
442 pinctrl-0 = <&pinctrl_usart0 &pinctrl_usart0_rts &pinctrl_usart0_cts>;
443 clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
444 clock-names = "usart";
445 status = "disabled";
446 };
448 usart1: serial@f8030000 {
449 compatible = "atmel,at91sam9260-usart";
450 reg = <0xf8030000 0x100>;
451 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
452 dmas = <&dma0
453 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
454 | AT91_XDMAC_DT_PERID(38))>,
455 <&dma0
456 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
457 | AT91_XDMAC_DT_PERID(39))>;
458 dma-names = "tx", "rx";
459 pinctrl-names = "default";
460 pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts &pinctrl_usart1_cts>;
461 clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
462 clock-names = "usart";
463 status = "disabled";
464 };
466 mmc1: mmc@fc000000 {
467 compatible = "atmel,hsmci";
468 reg = <0xfc000000 0x600>;
469 interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>;
470 dmas = <&dma1
471 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
472 | AT91_XDMAC_DT_PERID(1))>;
473 dma-names = "rxtx";
474 pinctrl-names = "default";
475 pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
476 status = "disabled";
477 #address-cells = <1>;
478 #size-cells = <0>;
479 clocks = <&pmc PMC_TYPE_PERIPHERAL 36>;
480 clock-names = "mci_clk";
481 };
483 uart1: serial@fc004000 {
484 compatible = "atmel,at91sam9260-usart";
485 reg = <0xfc004000 0x100>;
486 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
487 dmas = <&dma0
488 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
489 | AT91_XDMAC_DT_PERID(24))>,
490 <&dma0
491 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
492 | AT91_XDMAC_DT_PERID(25))>;
493 dma-names = "tx", "rx";
494 pinctrl-names = "default";
495 pinctrl-0 = <&pinctrl_uart1>;
496 clocks = <&pmc PMC_TYPE_PERIPHERAL 28>;
497 clock-names = "usart";
498 status = "disabled";
499 };
501 usart2: serial@fc008000 {
502 compatible = "atmel,at91sam9260-usart";
503 reg = <0xfc008000 0x100>;
504 interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
505 dmas = <&dma1
506 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
507 | AT91_XDMAC_DT_PERID(16))>,
508 <&dma1
509 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
510 | AT91_XDMAC_DT_PERID(17))>;
511 dma-names = "tx", "rx";
512 pinctrl-names = "default";
513 pinctrl-0 = <&pinctrl_usart2 &pinctrl_usart2_rts &pinctrl_usart2_cts>;
514 clocks = <&pmc PMC_TYPE_PERIPHERAL 29>;
515 clock-names = "usart";
516 status = "disabled";
517 };
519 usart3: serial@fc00c000 {
520 compatible = "atmel,at91sam9260-usart";
521 reg = <0xfc00c000 0x100>;
522 interrupts = <30 IRQ_TYPE_LEVEL_HIGH 5>;
523 dmas = <&dma1
524 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
525 | AT91_XDMAC_DT_PERID(18))>,
526 <&dma1
527 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
528 | AT91_XDMAC_DT_PERID(19))>;
529 dma-names = "tx", "rx";
530 pinctrl-names = "default";
531 pinctrl-0 = <&pinctrl_usart3>;
532 clocks = <&pmc PMC_TYPE_PERIPHERAL 30>;
533 clock-names = "usart";
534 status = "disabled";
535 };
537 usart4: serial@fc010000 {
538 compatible = "atmel,at91sam9260-usart";
539 reg = <0xfc010000 0x100>;
540 interrupts = <31 IRQ_TYPE_LEVEL_HIGH 5>;
541 dmas = <&dma1
542 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
543 | AT91_XDMAC_DT_PERID(20))>,
544 <&dma1
545 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
546 | AT91_XDMAC_DT_PERID(21))>;
547 dma-names = "tx", "rx";
548 pinctrl-names = "default";
549 pinctrl-0 = <&pinctrl_usart4>;
550 clocks = <&pmc PMC_TYPE_PERIPHERAL 31>;
551 clock-names = "usart";
552 status = "disabled";
553 };
555 ssc1: ssc@fc014000 {
556 compatible = "atmel,at91sam9g45-ssc";
557 reg = <0xfc014000 0x4000>;
558 interrupts = <49 IRQ_TYPE_LEVEL_HIGH 0>;
559 pinctrl-names = "default";
560 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
561 dmas = <&dma1
562 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
563 | AT91_XDMAC_DT_PERID(28))>,
564 <&dma1
565 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
566 | AT91_XDMAC_DT_PERID(29))>;
567 dma-names = "tx", "rx";
568 clocks = <&pmc PMC_TYPE_PERIPHERAL 49>;
569 clock-names = "pclk";
570 status = "disabled";
571 };
573 spi1: spi@fc018000 {
574 #address-cells = <1>;
575 #size-cells = <0>;
576 compatible = "atmel,at91rm9200-spi";
577 reg = <0xfc018000 0x100>;
578 interrupts = <38 IRQ_TYPE_LEVEL_HIGH 3>;
579 dmas = <&dma1
580 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
581 | AT91_XDMAC_DT_PERID(12))>,
582 <&dma1
583 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
584 | AT91_XDMAC_DT_PERID(13))>;
585 dma-names = "tx", "rx";
586 pinctrl-names = "default";
587 pinctrl-0 = <&pinctrl_spi1>;
588 clocks = <&pmc PMC_TYPE_PERIPHERAL 38>;
589 clock-names = "spi_clk";
590 status = "disabled";
591 };
593 spi2: spi@fc01c000 {
594 #address-cells = <1>;
595 #size-cells = <0>;
596 compatible = "atmel,at91rm9200-spi";
597 reg = <0xfc01c000 0x100>;
598 interrupts = <39 IRQ_TYPE_LEVEL_HIGH 3>;
599 dmas = <&dma0
600 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
601 | AT91_XDMAC_DT_PERID(14))>,
602 <&dma0
603 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
604 | AT91_XDMAC_DT_PERID(15))>;
605 dma-names = "tx", "rx";
606 pinctrl-names = "default";
607 pinctrl-0 = <&pinctrl_spi2>;
608 clocks = <&pmc PMC_TYPE_PERIPHERAL 39>;
609 clock-names = "spi_clk";
610 status = "disabled";
611 };
613 tcb1: timer@fc020000 {
614 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
615 #address-cells = <1>;
616 #size-cells = <0>;
617 reg = <0xfc020000 0x100>;
618 interrupts = <41 IRQ_TYPE_LEVEL_HIGH 0>;
619 clocks = <&pmc PMC_TYPE_PERIPHERAL 41>, <&clk32k>;
620 clock-names = "t0_clk", "slow_clk";
621 };
623 tcb2: timer@fc024000 {
624 compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
625 #address-cells = <1>;
626 #size-cells = <0>;
627 reg = <0xfc024000 0x100>;
628 interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>;
629 clocks = <&pmc PMC_TYPE_PERIPHERAL 42>, <&clk32k>;
630 clock-names = "t0_clk", "slow_clk";
631 };
633 macb1: ethernet@fc028000 {
634 compatible = "atmel,sama5d4-gem";
635 reg = <0xfc028000 0x100>;
636 interrupts = <55 IRQ_TYPE_LEVEL_HIGH 3>;
637 pinctrl-names = "default";
638 pinctrl-0 = <&pinctrl_macb1_rmii>;
639 #address-cells = <1>;
640 #size-cells = <0>;
641 clocks = <&pmc PMC_TYPE_PERIPHERAL 55>, <&pmc PMC_TYPE_PERIPHERAL 55>;
642 clock-names = "hclk", "pclk";
643 status = "disabled";
644 };
646 trng@fc030000 {
647 compatible = "atmel,at91sam9g45-trng";
648 reg = <0xfc030000 0x100>;
649 interrupts = <53 IRQ_TYPE_LEVEL_HIGH 0>;
650 clocks = <&pmc PMC_TYPE_PERIPHERAL 53>;
651 };
653 adc0: adc@fc034000 {
654 compatible = "atmel,at91sam9x5-adc";
655 reg = <0xfc034000 0x100>;
656 interrupts = <44 IRQ_TYPE_LEVEL_HIGH 5>;
657 clocks = <&pmc PMC_TYPE_PERIPHERAL 44>,
658 <&adc_op_clk>;
659 clock-names = "adc_clk", "adc_op_clk";
660 atmel,adc-channels-used = <0x01f>;
661 atmel,adc-startup-time = <40>;
662 atmel,adc-use-external-triggers;
663 atmel,adc-vref = <3000>;
664 atmel,adc-sample-hold-time = <11>;
665 atmel,adc-ts-pressure-threshold = <10000>;
666 status = "disabled";
667 };
669 aes@fc044000 {
670 compatible = "atmel,at91sam9g46-aes";
671 reg = <0xfc044000 0x100>;
672 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
673 dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
674 | AT91_XDMAC_DT_PERID(41))>,
675 <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
676 | AT91_XDMAC_DT_PERID(40))>;
677 dma-names = "tx", "rx";
678 clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
679 clock-names = "aes_clk";
680 status = "okay";
681 };
683 tdes@fc04c000 {
684 compatible = "atmel,at91sam9g46-tdes";
685 reg = <0xfc04c000 0x100>;
686 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 0>;
687 dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
688 | AT91_XDMAC_DT_PERID(42))>,
689 <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
690 | AT91_XDMAC_DT_PERID(43))>;
691 dma-names = "tx", "rx";
692 clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
693 clock-names = "tdes_clk";
694 status = "okay";
695 };
697 sha@fc050000 {
698 compatible = "atmel,at91sam9g46-sha";
699 reg = <0xfc050000 0x100>;
700 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 0>;
701 dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
702 | AT91_XDMAC_DT_PERID(44))>;
703 dma-names = "tx";
704 clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
705 clock-names = "sha_clk";
706 status = "okay";
707 };
709 hsmc: smc@fc05c000 {
710 compatible = "atmel,sama5d3-smc", "syscon", "simple-mfd";
711 reg = <0xfc05c000 0x1000>;
712 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 6>;
713 clocks = <&pmc PMC_TYPE_PERIPHERAL 22>;
714 #address-cells = <1>;
715 #size-cells = <1>;
716 ranges;
718 pmecc: ecc-engine@ffffc070 {
719 compatible = "atmel,sama5d4-pmecc";
720 reg = <0xfc05c070 0x490>,
721 <0xfc05c500 0x100>;
722 };
723 };
725 reset_controller: rstc@fc068600 {
726 compatible = "atmel,sama5d3-rstc", "atmel,at91sam9g45-rstc";
727 reg = <0xfc068600 0x10>;
728 clocks = <&clk32k>;
729 };
731 shutdown_controller: shdwc@fc068610 {
732 compatible = "atmel,at91sam9x5-shdwc";
733 reg = <0xfc068610 0x10>;
734 clocks = <&clk32k>;
735 };
737 pit: timer@fc068630 {
738 compatible = "atmel,at91sam9260-pit";
739 reg = <0xfc068630 0x10>;
740 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
741 clocks = <&pmc PMC_TYPE_CORE PMC_MCK2>;
742 };
744 watchdog: watchdog@fc068640 {
745 compatible = "atmel,sama5d4-wdt";
746 reg = <0xfc068640 0x10>;
747 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 7>;
748 clocks = <&clk32k>;
749 status = "disabled";
750 };
752 clk32k: sckc@fc068650 {
753 compatible = "atmel,sama5d4-sckc";
754 reg = <0xfc068650 0x4>;
755 #clock-cells = <0>;
756 clocks = <&slow_xtal>;
757 };
759 rtc@fc0686b0 {
760 compatible = "atmel,sama5d4-rtc";
761 reg = <0xfc0686b0 0x30>;
762 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
763 clocks = <&clk32k>;
764 };
766 dbgu: serial@fc069000 {
767 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
768 reg = <0xfc069000 0x200>;
769 interrupts = <45 IRQ_TYPE_LEVEL_HIGH 7>;
770 pinctrl-names = "default";
771 pinctrl-0 = <&pinctrl_dbgu>;
772 clocks = <&pmc PMC_TYPE_PERIPHERAL 45>;
773 clock-names = "usart";
774 status = "disabled";
775 };
778 pinctrl: pinctrl@fc06a000 {
779 #address-cells = <1>;
780 #size-cells = <1>;
781 compatible = "atmel,sama5d3-pinctrl", "atmel,at91sam9x5-pinctrl", "simple-bus";
782 ranges = <0xfc068000 0xfc068000 0x100
783 0xfc06a000 0xfc06a000 0x4000>;
784 /* WARNING: revisit as pin spec has changed */
785 atmel,mux-mask = <
786 /* A B C */
787 0xffffffff 0x3ffcfe7c 0x1c010101 /* pioA */
788 0x7fffffff 0xfffccc3a 0x3f00cc3a /* pioB */
789 0xffffffff 0x3ff83fff 0xff00ffff /* pioC */
790 0x0003ff00 0x8002a800 0x00000000 /* pioD */
791 0xffffffff 0x7fffffff 0x76fff1bf /* pioE */
792 >;
794 pioA: gpio@fc06a000 {
795 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
796 reg = <0xfc06a000 0x100>;
797 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 1>;
798 #gpio-cells = <2>;
799 gpio-controller;
800 interrupt-controller;
801 #interrupt-cells = <2>;
802 clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
803 };
805 pioB: gpio@fc06b000 {
806 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
807 reg = <0xfc06b000 0x100>;
808 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 1>;
809 #gpio-cells = <2>;
810 gpio-controller;
811 interrupt-controller;
812 #interrupt-cells = <2>;
813 clocks = <&pmc PMC_TYPE_PERIPHERAL 24>;
814 };
816 pioC: gpio@fc06c000 {
817 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
818 reg = <0xfc06c000 0x100>;
819 interrupts = <25 IRQ_TYPE_LEVEL_HIGH 1>;
820 #gpio-cells = <2>;
821 gpio-controller;
822 interrupt-controller;
823 #interrupt-cells = <2>;
824 clocks = <&pmc PMC_TYPE_PERIPHERAL 25>;
825 };
827 pioD: gpio@fc068000 {
828 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
829 reg = <0xfc068000 0x100>;
830 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
831 #gpio-cells = <2>;
832 gpio-controller;
833 interrupt-controller;
834 #interrupt-cells = <2>;
835 clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
836 };
838 pioE: gpio@fc06d000 {
839 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
840 reg = <0xfc06d000 0x100>;
841 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 1>;
842 #gpio-cells = <2>;
843 gpio-controller;
844 interrupt-controller;
845 #interrupt-cells = <2>;
846 clocks = <&pmc PMC_TYPE_PERIPHERAL 26>;
847 };
849 /* pinctrl pin settings */
850 adc0 {
851 pinctrl_adc0_adtrg: adc0_adtrg {
852 atmel,pins =
853 <AT91_PIOE 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* conflicts with USBA_VBUS */
854 };
855 pinctrl_adc0_ad0: adc0_ad0 {
856 atmel,pins =
857 <AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
858 };
859 pinctrl_adc0_ad1: adc0_ad1 {
860 atmel,pins =
861 <AT91_PIOC 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
862 };
863 pinctrl_adc0_ad2: adc0_ad2 {
864 atmel,pins =
865 <AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
866 };
867 pinctrl_adc0_ad3: adc0_ad3 {
868 atmel,pins =
869 <AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
870 };
871 pinctrl_adc0_ad4: adc0_ad4 {
872 atmel,pins =
873 <AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
874 };
875 };
877 dbgu {
878 pinctrl_dbgu: dbgu-0 {
879 atmel,pins =
880 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* conflicts with D14 and TDI */
881 AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* conflicts with D15 and TDO */
882 };
883 };
885 ebi {
886 pinctrl_ebi_addr: ebi-addr-0 {
887 atmel,pins =
888 <AT91_PIOE 0 AT91_PERIPH_A AT91_PINCTRL_NONE
889 AT91_PIOE 1 AT91_PERIPH_A AT91_PINCTRL_NONE
890 AT91_PIOE 2 AT91_PERIPH_A AT91_PINCTRL_NONE
891 AT91_PIOE 3 AT91_PERIPH_A AT91_PINCTRL_NONE
892 AT91_PIOE 4 AT91_PERIPH_A AT91_PINCTRL_NONE
893 AT91_PIOE 5 AT91_PERIPH_A AT91_PINCTRL_NONE
894 AT91_PIOE 6 AT91_PERIPH_A AT91_PINCTRL_NONE
895 AT91_PIOE 7 AT91_PERIPH_A AT91_PINCTRL_NONE
896 AT91_PIOE 8 AT91_PERIPH_A AT91_PINCTRL_NONE
897 AT91_PIOE 9 AT91_PERIPH_A AT91_PINCTRL_NONE
898 AT91_PIOE 10 AT91_PERIPH_A AT91_PINCTRL_NONE
899 AT91_PIOE 11 AT91_PERIPH_A AT91_PINCTRL_NONE
900 AT91_PIOE 12 AT91_PERIPH_A AT91_PINCTRL_NONE
901 AT91_PIOE 13 AT91_PERIPH_A AT91_PINCTRL_NONE
902 AT91_PIOE 14 AT91_PERIPH_A AT91_PINCTRL_NONE
903 AT91_PIOE 15 AT91_PERIPH_A AT91_PINCTRL_NONE
904 AT91_PIOE 16 AT91_PERIPH_A AT91_PINCTRL_NONE
905 AT91_PIOE 17 AT91_PERIPH_A AT91_PINCTRL_NONE
906 AT91_PIOE 18 AT91_PERIPH_A AT91_PINCTRL_NONE
907 AT91_PIOE 19 AT91_PERIPH_A AT91_PINCTRL_NONE
908 AT91_PIOE 20 AT91_PERIPH_A AT91_PINCTRL_NONE
909 AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE
910 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE
911 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE
912 AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_NONE
913 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
914 };
916 pinctrl_ebi_nand_addr: ebi-addr-1 {
917 atmel,pins =
918 <AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE
919 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE>;
920 };
922 pinctrl_ebi_cs0: ebi-cs0-0 {
923 atmel,pins =
924 <AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
925 };
927 pinctrl_ebi_cs1: ebi-cs1-0 {
928 atmel,pins =
929 <AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
930 };
932 pinctrl_ebi_cs2: ebi-cs2-0 {
933 atmel,pins =
934 <AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
935 };
937 pinctrl_ebi_cs3: ebi-cs3-0 {
938 atmel,pins =
939 <AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
940 };
942 pinctrl_ebi_data_0_7: ebi-data-lsb-0 {
943 atmel,pins =
944 <AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE
945 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE
946 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE
947 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE
948 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE
949 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE
950 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE
951 AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE>;
952 };
954 pinctrl_ebi_data_8_15: ebi-data-msb-0 {
955 atmel,pins =
956 <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE
957 AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE
958 AT91_PIOB 20 AT91_PERIPH_B AT91_PINCTRL_NONE
959 AT91_PIOB 21 AT91_PERIPH_B AT91_PINCTRL_NONE
960 AT91_PIOB 22 AT91_PERIPH_B AT91_PINCTRL_NONE
961 AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE
962 AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE
963 AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE>;
964 };
966 pinctrl_ebi_nandrdy: ebi-nandrdy-0 {
967 atmel,pins =
968 <AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE>;
969 };
971 pinctrl_ebi_nrd_nandoe: ebi-nrd-nandoe-0 {
972 atmel,pins =
973 <AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;
974 };
976 pinctrl_ebi_nwait: ebi-nwait-0 {
977 atmel,pins =
978 <AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
979 };
981 pinctrl_ebi_nwe_nandwe: ebi-nwe-nandwe-0 {
982 atmel,pins =
983 <AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE>;
984 };
986 pinctrl_ebi_nwr1_nbs1: ebi-nwr1-nbs1-0 {
987 atmel,pins =
988 <AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
989 };
990 };
992 i2c0 {
993 pinctrl_i2c0: i2c0-0 {
994 atmel,pins =
995 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE
996 AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
997 };
999 pinctrl_i2c0_gpio: i2c0-gpio {
1000 atmel,pins =
1001 <AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
1002 AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
1003 };
1004 };
1006 i2c1 {
1007 pinctrl_i2c1: i2c1-0 {
1008 atmel,pins =
1009 <AT91_PIOE 29 AT91_PERIPH_C AT91_PINCTRL_NONE /* TWD1, conflicts with UART0 RX and DIBP */
1010 AT91_PIOE 30 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* TWCK1, conflicts with UART0 TX and DIBN */
1011 };
1013 pinctrl_i2c1_gpio: i2c1-gpio {
1014 atmel,pins =
1015 <AT91_PIOE 29 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
1016 AT91_PIOE 30 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
1017 };
1018 };
1020 i2c2 {
1021 pinctrl_i2c2: i2c2-0 {
1022 atmel,pins =
1023 <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* TWD2, conflicts with RD0 and PWML1 */
1024 AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* TWCK2, conflicts with RF0 */
1025 };
1027 pinctrl_i2c2_gpio: i2c2-gpio {
1028 atmel,pins =
1029 <AT91_PIOB 29 AT91_PERIPH_GPIO AT91_PINCTRL_NONE
1030 AT91_PIOB 30 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
1031 };
1032 };
1034 isi {
1035 pinctrl_isi_data_0_7: isi-0-data-0-7 {
1036 atmel,pins =
1037 <AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D0 */
1038 AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D1 */
1039 AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D2 */
1040 AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D3 */
1041 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D4 */
1042 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D5 */
1043 AT91_PIOC 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D6 */
1044 AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* ISI_D7 */
1045 AT91_PIOB 1 AT91_PERIPH_C AT91_PINCTRL_NONE /* ISI_PCK, conflict with G0_RXCK */
1046 AT91_PIOB 3 AT91_PERIPH_C AT91_PINCTRL_NONE /* ISI_VSYNC */
1047 AT91_PIOB 4 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* ISI_HSYNC */
1048 };
1049 pinctrl_isi_data_8_9: isi-0-data-8-9 {
1050 atmel,pins =
1051 <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE /* ISI_D8, conflicts with SPI0_MISO, PWMH2 */
1052 AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* ISI_D9, conflicts with SPI0_MOSI, PWML2 */
1053 };
1054 pinctrl_isi_data_10_11: isi-0-data-10-11 {
1055 atmel,pins =
1056 <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE /* ISI_D10, conflicts with SPI0_SPCK, PWMH3 */
1057 AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* ISI_D11, conflicts with SPI0_NPCS0, PWML3 */
1058 };
1059 };
1061 lcd {
1062 pinctrl_lcd_base: lcd-base-0 {
1063 atmel,pins =
1064 <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDVSYNC */
1065 AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDHSYNC */
1066 AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDDEN */
1067 AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDPCK */
1068 };
1069 pinctrl_lcd_pwm: lcd-pwm-0 {
1070 atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDPWM */
1071 };
1072 pinctrl_lcd_rgb444: lcd-rgb-0 {
1073 atmel,pins =
1074 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */
1075 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
1076 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
1077 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
1078 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
1079 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
1080 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
1081 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
1082 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */
1083 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
1084 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */
1085 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD11 pin */
1086 };
1087 pinctrl_lcd_rgb565: lcd-rgb-1 {
1088 atmel,pins =
1089 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */
1090 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
1091 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
1092 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
1093 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
1094 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
1095 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
1096 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
1097 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */
1098 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
1099 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */
1100 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */
1101 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */
1102 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */
1103 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */
1104 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD15 pin */
1105 };
1106 pinctrl_lcd_rgb666: lcd-rgb-2 {
1107 atmel,pins =
1108 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
1109 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
1110 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
1111 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
1112 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
1113 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
1114 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */
1115 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */
1116 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */
1117 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */
1118 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */
1119 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD15 pin */
1120 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD18 pin */
1121 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD19 pin */
1122 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD20 pin */
1123 AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD21 pin */
1124 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD22 pin */
1125 AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */
1126 };
1127 pinctrl_lcd_rgb777: lcd-rgb-3 {
1128 atmel,pins =
1129 /* LCDDAT0 conflicts with TMS */
1130 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
1131 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
1132 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
1133 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
1134 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
1135 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
1136 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
1137 /* LCDDAT8 conflicts with TCK */
1138 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
1139 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */
1140 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */
1141 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */
1142 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */
1143 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */
1144 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD15 pin */
1145 /* LCDDAT16 conflicts with NTRST */
1146 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD17 pin */
1147 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD18 pin */
1148 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD19 pin */
1149 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD20 pin */
1150 AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD21 pin */
1151 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD22 pin */
1152 AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */
1153 };
1154 pinctrl_lcd_rgb888: lcd-rgb-4 {
1155 atmel,pins =
1156 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */
1157 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
1158 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
1159 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
1160 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
1161 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
1162 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
1163 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
1164 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */
1165 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
1166 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD10 pin */
1167 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD11 pin */
1168 AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD12 pin */
1169 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD13 pin */
1170 AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD14 pin */
1171 AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD15 pin */
1172 AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD16 pin */
1173 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD17 pin */
1174 AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD18 pin */
1175 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD19 pin */
1176 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD20 pin */
1177 AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD21 pin */
1178 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD22 pin */
1179 AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* LCDD23 pin */
1180 };
1181 };
1183 macb0 {
1184 pinctrl_macb0_rmii: macb0_rmii-0 {
1185 atmel,pins =
1186 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_TX0 */
1187 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_TX1 */
1188 AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_RX0 */
1189 AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_RX1 */
1190 AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_RXDV */
1191 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_RXER */
1192 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_TXEN */
1193 AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_TXCK */
1194 AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_MDC */
1195 AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* G0_MDIO */
1196 >;
1197 };
1198 };
1200 macb1 {
1201 pinctrl_macb1_rmii: macb1_rmii-0 {
1202 atmel,pins =
1203 <AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_TX0 */
1204 AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_TX1 */
1205 AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_RX0 */
1206 AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_RX1 */
1207 AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_RXDV */
1208 AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_RXER */
1209 AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_TXEN */
1210 AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_TXCK */
1211 AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_MDC */
1212 AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* G1_MDIO */
1213 >;
1214 };
1215 };
1217 mmc0 {
1218 pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 {
1219 atmel,pins =
1220 <AT91_PIOC 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* MCI0_CK, conflict with PCK1(ISI_MCK) */
1221 AT91_PIOC 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_CDA, conflict with NAND_D0 */
1222 AT91_PIOC 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA0, conflict with NAND_D1 */
1223 >;
1224 };
1225 pinctrl_mmc0_dat1_3: mmc0_dat1_3 {
1226 atmel,pins =
1227 <AT91_PIOC 7 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA1, conflict with NAND_D2 */
1228 AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA2, conflict with NAND_D3 */
1229 AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA3, conflict with NAND_D4 */
1230 >;
1231 };
1232 pinctrl_mmc0_dat4_7: mmc0_dat4_7 {
1233 atmel,pins =
1234 <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA4, conflict with NAND_D5 */
1235 AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA5, conflict with NAND_D6 */
1236 AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA6, conflict with NAND_D7 */
1237 AT91_PIOC 13 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* MCI0_DA7, conflict with NAND_OE */
1238 >;
1239 };
1240 };
1242 mmc1 {
1243 pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 {
1244 atmel,pins =
1245 <AT91_PIOE 18 AT91_PERIPH_C AT91_PINCTRL_NONE /* MCI1_CK */
1246 AT91_PIOE 19 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_CDA */
1247 AT91_PIOE 20 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_DA0 */
1248 >;
1249 };
1250 pinctrl_mmc1_dat1_3: mmc1_dat1_3 {
1251 atmel,pins =
1252 <AT91_PIOE 21 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_DA1 */
1253 AT91_PIOE 22 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_DA2 */
1254 AT91_PIOE 23 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* MCI1_DA3 */
1255 >;
1256 };
1257 };
1259 nand0 {
1260 pinctrl_nand: nand-0 {
1261 atmel,pins =
1262 <AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC13 periph A Read Enable */
1263 AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC14 periph A Write Enable */
1265 AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC17 ALE */
1266 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC18 CLE */
1268 AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC15 NCS3/Chip Enable */
1269 AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC16 NANDRDY */
1270 AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC5 Data bit 0 */
1271 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC6 Data bit 1 */
1272 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC7 Data bit 2 */
1273 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC8 Data bit 3 */
1274 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC9 Data bit 4 */
1275 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC10 Data bit 5 */
1276 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC11 periph A Data bit 6 */
1277 AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC12 periph A Data bit 7 */
1278 };
1279 };
1281 spi0 {
1282 pinctrl_spi0: spi0-0 {
1283 atmel,pins =
1284 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI0_MISO */
1285 AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI0_MOSI */
1286 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI0_SPCK */
1287 >;
1288 };
1289 };
1291 ssc0 {
1292 pinctrl_ssc0_tx: ssc0_tx {
1293 atmel,pins =
1294 <AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* TK0 */
1295 AT91_PIOB 31 AT91_PERIPH_B AT91_PINCTRL_NONE /* TF0 */
1296 AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TD0 */
1297 };
1299 pinctrl_ssc0_rx: ssc0_rx {
1300 atmel,pins =
1301 <AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* RK0 */
1302 AT91_PIOB 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* RF0 */
1303 AT91_PIOB 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* RD0 */
1304 };
1305 };
1307 ssc1 {
1308 pinctrl_ssc1_tx: ssc1_tx {
1309 atmel,pins =
1310 <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE /* TK1 */
1311 AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* TF1 */
1312 AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* TD1 */
1313 };
1315 pinctrl_ssc1_rx: ssc1_rx {
1316 atmel,pins =
1317 <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* RK1 */
1318 AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* RF1 */
1319 AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* RD1 */
1320 };
1321 };
1323 spi1 {
1324 pinctrl_spi1: spi1-0 {
1325 atmel,pins =
1326 <AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI1_MISO */
1327 AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI1_MOSI */
1328 AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* SPI1_SPCK */
1329 >;
1330 };
1331 };
1333 spi2 {
1334 pinctrl_spi2: spi2-0 {
1335 atmel,pins =
1336 <AT91_PIOD 11 AT91_PERIPH_B AT91_PINCTRL_NONE /* SPI2_MISO conflicts with RTS0 */
1337 AT91_PIOD 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* SPI2_MOSI conflicts with TXD0 */
1338 AT91_PIOD 15 AT91_PERIPH_B AT91_PINCTRL_NONE /* SPI2_SPCK conflicts with RTS1 */
1339 >;
1340 };
1341 };
1343 uart0 {
1344 pinctrl_uart0: uart0-0 {
1345 atmel,pins =
1346 <AT91_PIOE 29 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* RXD */
1347 AT91_PIOE 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* TXD */
1348 >;
1349 };
1350 };
1352 uart1 {
1353 pinctrl_uart1: uart1-0 {
1354 atmel,pins =
1355 <AT91_PIOC 25 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* RXD */
1356 AT91_PIOC 26 AT91_PERIPH_C AT91_PINCTRL_NONE /* TXD */
1357 >;
1358 };
1359 };
1361 usart0 {
1362 pinctrl_usart0: usart0-0 {
1363 atmel,pins =
1364 <AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* RXD */
1365 AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* TXD */
1366 >;
1367 };
1368 pinctrl_usart0_rts: usart0_rts-0 {
1369 atmel,pins = <AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1370 };
1371 pinctrl_usart0_cts: usart0_cts-0 {
1372 atmel,pins = <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1373 };
1374 };
1376 usart1 {
1377 pinctrl_usart1: usart1-0 {
1378 atmel,pins =
1379 <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* RXD */
1380 AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* TXD */
1381 >;
1382 };
1383 pinctrl_usart1_rts: usart1_rts-0 {
1384 atmel,pins = <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1385 };
1386 pinctrl_usart1_cts: usart1_cts-0 {
1387 atmel,pins = <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE>;
1388 };
1389 };
1391 usart2 {
1392 pinctrl_usart2: usart2-0 {
1393 atmel,pins =
1394 <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* RXD - conflicts with G0_CRS, ISI_HSYNC */
1395 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE /* TXD - conflicts with G0_COL, PCK2 */
1396 >;
1397 };
1398 pinctrl_usart2_rts: usart2_rts-0 {
1399 atmel,pins = <AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with G0_RX3, PWMH1 */
1400 };
1401 pinctrl_usart2_cts: usart2_cts-0 {
1402 atmel,pins = <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with G0_TXER, ISI_VSYNC */
1403 };
1404 };
1406 usart3 {
1407 pinctrl_usart3: usart3-0 {
1408 atmel,pins =
1409 <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* RXD */
1410 AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_NONE /* TXD */
1411 >;
1412 };
1413 };
1415 usart4 {
1416 pinctrl_usart4: usart4-0 {
1417 atmel,pins =
1418 <AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* RXD */
1419 AT91_PIOE 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* TXD */
1420 >;
1421 };
1422 pinctrl_usart4_rts: usart4_rts-0 {
1423 atmel,pins = <AT91_PIOE 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* conflicts with NWAIT, A19 */
1424 };
1425 pinctrl_usart4_cts: usart4_cts-0 {
1426 atmel,pins = <AT91_PIOE 0 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* conflicts with A0/NBS0, MCI0_CDB */
1427 };
1428 };
1429 };
1431 aic: interrupt-controller@fc06e000 {
1432 #interrupt-cells = <3>;
1433 compatible = "atmel,sama5d4-aic";
1434 interrupt-controller;
1435 reg = <0xfc06e000 0x200>;
1436 atmel,external-irqs = <56>;
1437 };
1438 };
1439 };
1440 };