WIP FPC-III support
[linux/fpc-iii.git] / arch / arm / boot / dts / ste-href.dtsi
blobff47cbf6ed3b7c6b66298c7022f9f897f53de852
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Copyright 2012 ST-Ericsson AB
4  */
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include "ste-href-family-pinctrl.dtsi"
9 / {
10         memory {
11                 device_type = "memory";
12                 reg = <0x00000000 0x20000000>;
13         };
15         soc {
16                 uart@80120000 {
17                         pinctrl-names = "default", "sleep";
18                         pinctrl-0 = <&u0_a_1_default>;
19                         pinctrl-1 = <&u0_a_1_sleep>;
20                         status = "okay";
21                 };
23                 /* This UART is unused and thus left disabled */
24                 uart@80121000 {
25                         pinctrl-names = "default", "sleep";
26                         pinctrl-0 = <&u1rxtx_a_1_default>;
27                         pinctrl-1 = <&u1rxtx_a_1_sleep>;
28                 };
30                 uart@80007000 {
31                         pinctrl-names = "default", "sleep";
32                         pinctrl-0 = <&u2rxtx_c_1_default>;
33                         pinctrl-1 = <&u2rxtx_c_1_sleep>;
34                         status = "okay";
35                 };
37                 i2c@80004000 {
38                         pinctrl-names = "default","sleep";
39                         pinctrl-0 = <&i2c0_a_1_default>;
40                         pinctrl-1 = <&i2c0_a_1_sleep>;
41                         status = "okay";
42                 };
44                 i2c@80122000 {
45                         pinctrl-names = "default","sleep";
46                         pinctrl-0 = <&i2c1_b_2_default>;
47                         pinctrl-1 = <&i2c1_b_2_sleep>;
48                         status = "okay";
49                 };
51                 i2c@80128000 {
52                         pinctrl-names = "default","sleep";
53                         pinctrl-0 = <&i2c2_b_2_default>;
54                         pinctrl-1 = <&i2c2_b_2_sleep>;
55                         status = "okay";
56                         lp5521@33 {
57                                 compatible = "national,lp5521";
58                                 reg = <0x33>;
59                                 label = "lp5521_pri";
60                                 clock-mode = /bits/ 8 <2>;
61                                 #address-cells = <1>;
62                                 #size-cells = <0>;
63                                 chan@0 {
64                                         reg = <0>;
65                                         led-cur = /bits/ 8 <0x2f>;
66                                         max-cur = /bits/ 8 <0x5f>;
67                                         linux,default-trigger = "heartbeat";
68                                 };
69                                 chan@1 {
70                                         reg = <1>;
71                                         led-cur = /bits/ 8 <0x2f>;
72                                         max-cur = /bits/ 8 <0x5f>;
73                                 };
74                                 chan@2 {
75                                         reg = <2>;
76                                         led-cur = /bits/ 8 <0x2f>;
77                                         max-cur = /bits/ 8 <0x5f>;
78                                 };
79                         };
80                         lp5521@34 {
81                                 compatible = "national,lp5521";
82                                 reg = <0x34>;
83                                 label = "lp5521_sec";
84                                 clock-mode = /bits/ 8 <2>;
85                                 #address-cells = <1>;
86                                 #size-cells = <0>;
87                                 chan@0 {
88                                         reg = <0>;
89                                         led-cur = /bits/ 8 <0x2f>;
90                                         max-cur = /bits/ 8 <0x5f>;
91                                 };
92                                 chan@1 {
93                                         reg = <1>;
94                                         led-cur = /bits/ 8 <0x2f>;
95                                         max-cur = /bits/ 8 <0x5f>;
96                                 };
97                                 chan@2 {
98                                         reg = <2>;
99                                         led-cur = /bits/ 8 <0x2f>;
100                                         max-cur = /bits/ 8 <0x5f>;
101                                 };
102                         };
103                         bh1780@29 {
104                                 compatible = "rohm,bh1780gli";
105                                 reg = <0x29>;
106                         };
107                 };
109                 i2c@80110000 {
110                         pinctrl-names = "default","sleep";
111                         pinctrl-0 = <&i2c3_c_2_default>;
112                         pinctrl-1 = <&i2c3_c_2_sleep>;
113                         status = "okay";
114                 };
116                 /* ST6G3244ME level translator for 1.8/2.9 V */
117                 vmmci: regulator-gpio {
118                         compatible = "regulator-gpio";
120                         regulator-min-microvolt = <1800000>;
121                         regulator-max-microvolt = <2900000>;
122                         regulator-name = "mmci-reg";
123                         regulator-type = "voltage";
125                         startup-delay-us = <100>;
127                         states = <1800000 0x1
128                                   2900000 0x0>;
129                 };
131                 // External Micro SD slot
132                 sdi0_per1@80126000 {
133                         arm,primecell-periphid = <0x10480180>;
134                         max-frequency = <100000000>;
135                         bus-width = <4>;
136                         cap-sd-highspeed;
137                         cap-mmc-highspeed;
138                         sd-uhs-sdr12;
139                         sd-uhs-sdr25;
140                         full-pwr-cycle;
141                         st,sig-dir-dat0;
142                         st,sig-dir-dat2;
143                         st,sig-dir-cmd;
144                         st,sig-pin-fbclk;
145                         vmmc-supply = <&ab8500_ldo_aux3_reg>;
146                         vqmmc-supply = <&vmmci>;
147                         pinctrl-names = "default", "sleep";
148                         pinctrl-0 = <&mc0_a_1_default &sdi0_default_mode>;
149                         pinctrl-1 = <&mc0_a_1_sleep>;
151                         status = "okay";
152                 };
154                 // WLAN SDIO channel
155                 sdi1_per2@80118000 {
156                         arm,primecell-periphid = <0x10480180>;
157                         max-frequency = <100000000>;
158                         bus-width = <4>;
159                         non-removable;
160                         pinctrl-names = "default", "sleep";
161                         pinctrl-0 = <&mc1_a_1_default>;
162                         pinctrl-1 = <&mc1_a_1_sleep>;
164                         status = "okay";
165                 };
167                 // PoP:ed eMMC
168                 sdi2_per3@80005000 {
169                         arm,primecell-periphid = <0x10480180>;
170                         max-frequency = <100000000>;
171                         bus-width = <8>;
172                         cap-mmc-highspeed;
173                         non-removable;
174                         vmmc-supply = <&db8500_vsmps2_reg>;
175                         pinctrl-names = "default", "sleep";
176                         pinctrl-0 = <&mc2_a_1_default>;
177                         pinctrl-1 = <&mc2_a_1_sleep>;
179                         status = "okay";
180                 };
182                 // On-board eMMC
183                 sdi4_per2@80114000 {
184                         arm,primecell-periphid = <0x10480180>;
185                         max-frequency = <100000000>;
186                         bus-width = <8>;
187                         cap-mmc-highspeed;
188                         non-removable;
189                         vmmc-supply = <&ab8500_ldo_aux2_reg>;
190                         pinctrl-names = "default", "sleep";
191                         pinctrl-0 = <&mc4_a_1_default>;
192                         pinctrl-1 = <&mc4_a_1_sleep>;
194                         status = "okay";
195                 };
197                 msp0: msp@80123000 {
198                         pinctrl-names = "default";
199                         pinctrl-0 = <&msp0txrxtfstck_a_1_default>;
200                         status = "okay";
201                 };
203                 msp1: msp@80124000 {
204                         pinctrl-names = "default";
205                         pinctrl-0 = <&msp1txrx_a_1_default>;
206                         status = "okay";
207                 };
209                 msp2: msp@80117000 {
210                         pinctrl-names = "default";
211                         pinctrl-0 = <&msp2_a_1_default>;
212                 };
214                 msp3: msp@80125000 {
215                         status = "okay";
216                 };
218                 prcmu@80157000 {
219                         ab8500 {
220                                 ab8500-gpio {
221                                 };
223                                 ab8500_usb {
224                                         pinctrl-names = "default", "sleep";
225                                         pinctrl-0 = <&usb_a_1_default>;
226                                         pinctrl-1 = <&usb_a_1_sleep>;
227                                 };
229                                 ab8500-regulators {
230                                         ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
231                                                 regulator-name = "V-DISPLAY";
232                                         };
234                                         ab8500_ldo_aux2_reg: ab8500_ldo_aux2 {
235                                                 regulator-name = "V-eMMC1";
236                                         };
238                                         ab8500_ldo_aux3_reg: ab8500_ldo_aux3 {
239                                                 regulator-name = "V-MMC-SD";
240                                         };
242                                         ab8500_ldo_intcore_reg: ab8500_ldo_intcore {
243                                                 regulator-name = "V-INTCORE";
244                                         };
246                                         ab8500_ldo_tvout_reg: ab8500_ldo_tvout {
247                                                 regulator-name = "V-TVOUT";
248                                         };
250                                         ab8500_ldo_audio_reg: ab8500_ldo_audio {
251                                                 regulator-name = "V-AUD";
252                                         };
254                                         ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 {
255                                                 regulator-name = "V-AMIC1";
256                                         };
258                                         ab8500_ldo_anamic2_reg: ab8500_ldo_anamic2 {
259                                                 regulator-name = "V-AMIC2";
260                                         };
262                                         ab8500_ldo_dmic_reg: ab8500_ldo_dmic {
263                                                 regulator-name = "V-DMIC";
264                                         };
266                                         ab8500_ldo_ana_reg: ab8500_ldo_ana {
267                                                 regulator-name = "V-CSI/DSI";
268                                         };
269                                 };
270                         };
271                 };
273                 pinctrl {
274                         sdi0 {
275                                 sdi0_default_mode: sdi0_default {
276                                         /* Some boards set additional settings here */
277                                 };
278                         };
279                 };
281                 mcde@a0350000 {
282                         pinctrl-names = "default", "sleep";
283                         pinctrl-0 = <&lcd_default_mode>;
284                         pinctrl-1 = <&lcd_sleep_mode>;
285                 };
286         };