| blob | f4e7660fead77ab86fd7a0797341285728eb2717 |
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Device Tree for the ST-Ericsson U300 Machine and SoC
4 */
6 /dts-v1/;
8 / {
9 model = "ST-Ericsson U300";
10 compatible = "stericsson,u300";
11 #address-cells = <1>;
12 #size-cells = <1>;
14 chosen {
15 bootargs = "root=/dev/ram0 console=ttyAMA0,115200n8 earlyprintk";
16 };
18 aliases {
19 serial0 = &uart0;
20 serial1 = &uart1;
21 };
23 memory {
24 device_type = "memory";
25 reg = <0x48000000 0x03c00000>;
26 };
28 s365 {
29 compatible = "stericsson,s365";
30 vana15-supply = <&ab3100_ldo_d_reg>;
31 syscon = <&syscon>;
32 };
34 syscon: syscon@c0011000 {
35 compatible = "stericsson,u300-syscon", "syscon";
36 reg = <0xc0011000 0x1000>;
37 clk32: app_32_clk@32k {
38 #clock-cells = <0>;
39 compatible = "fixed-clock";
40 clock-frequency = <32768>;
41 };
42 pll13: pll13@13M {
43 #clock-cells = <0>;
44 compatible = "fixed-clock";
45 clock-frequency = <13000000>;
46 };
47 /* Slow bridge clocks under PLL13 */
48 slow_clk: slow_clk@13M {
49 #clock-cells = <0>;
50 compatible = "stericsson,u300-syscon-clk";
51 clock-type = <0>; /* Slow */
52 clock-id = <0>;
53 clocks = <&pll13>;
54 };
55 uart0_clk: uart0_clk@13M {
56 #clock-cells = <0>;
57 compatible = "stericsson,u300-syscon-clk";
58 clock-type = <0>; /* Slow */
59 clock-id = <1>;
60 clocks = <&slow_clk>;
61 };
62 gpio_clk: gpio_clk@13M {
63 #clock-cells = <0>;
64 compatible = "stericsson,u300-syscon-clk";
65 clock-type = <0>; /* Slow */
66 clock-id = <4>;
67 clocks = <&slow_clk>;
68 };
69 rtc_clk: rtc_clk@13M {
70 #clock-cells = <0>;
71 compatible = "stericsson,u300-syscon-clk";
72 clock-type = <0>; /* Slow */
73 clock-id = <6>;
74 clocks = <&slow_clk>;
75 };
76 apptimer_clk: app_tmr_clk@13M {
77 #clock-cells = <0>;
78 compatible = "stericsson,u300-syscon-clk";
79 clock-type = <0>; /* Slow */
80 clock-id = <7>;
81 clocks = <&slow_clk>;
82 };
83 acc_tmr_clk@13M {
84 #clock-cells = <0>;
85 compatible = "stericsson,u300-syscon-clk";
86 clock-type = <0>; /* Slow */
87 clock-id = <8>;
88 clocks = <&slow_clk>;
89 };
90 pll208: pll208@208M {
91 #clock-cells = <0>;
92 compatible = "fixed-clock";
93 clock-frequency = <208000000>;
94 };
95 app208: app_208_clk@208M {
96 #clock-cells = <0>;
97 compatible = "fixed-factor-clock";
98 clock-div = <1>;
99 clock-mult = <1>;
100 clocks = <&pll208>;
101 };
102 cpu_clk@208M {
103 #clock-cells = <0>;
104 compatible = "stericsson,u300-syscon-clk";
105 clock-type = <2>; /* Rest */
106 clock-id = <3>;
107 clocks = <&app208>;
108 };
109 app104: app_104_clk@104M {
110 #clock-cells = <0>;
111 compatible = "fixed-factor-clock";
112 clock-div = <2>;
113 clock-mult = <1>;
114 clocks = <&pll208>;
115 };
116 semi_clk@104M {
117 #clock-cells = <0>;
118 compatible = "stericsson,u300-syscon-clk";
119 clock-type = <2>; /* Rest */
120 clock-id = <9>;
121 clocks = <&app104>;
122 };
123 app52: app_52_clk@52M {
124 #clock-cells = <0>;
125 compatible = "fixed-factor-clock";
126 clock-div = <4>;
127 clock-mult = <1>;
128 clocks = <&pll208>;
129 };
130 /* AHB subsystem clocks */
131 ahb_clk: ahb_subsys_clk@52M {
132 #clock-cells = <0>;
133 compatible = "stericsson,u300-syscon-clk";
134 clock-type = <2>; /* Rest */
135 clock-id = <10>;
136 clocks = <&app52>;
137 };
138 intcon_clk@52M {
139 #clock-cells = <0>;
140 compatible = "stericsson,u300-syscon-clk";
141 clock-type = <2>; /* Rest */
142 clock-id = <12>;
143 clocks = <&ahb_clk>;
144 };
145 emif_clk@52M {
146 #clock-cells = <0>;
147 compatible = "stericsson,u300-syscon-clk";
148 clock-type = <2>; /* Rest */
149 clock-id = <5>;
150 clocks = <&ahb_clk>;
151 };
152 dmac_clk: dmac_clk@52M {
153 #clock-cells = <0>;
154 compatible = "stericsson,u300-syscon-clk";
155 clock-type = <2>; /* Rest */
156 clock-id = <4>;
157 clocks = <&app52>;
158 };
159 fsmc_clk: fsmc_clk@52M {
160 #clock-cells = <0>;
161 compatible = "stericsson,u300-syscon-clk";
162 clock-type = <2>; /* Rest */
163 clock-id = <6>;
164 clocks = <&app52>;
165 };
166 xgam_clk: xgam_clk@52M {
167 #clock-cells = <0>;
168 compatible = "stericsson,u300-syscon-clk";
169 clock-type = <2>; /* Rest */
170 clock-id = <8>;
171 clocks = <&app52>;
172 };
173 app26: app_26_clk@26M {
174 #clock-cells = <0>;
175 compatible = "fixed-factor-clock";
176 clock-div = <2>;
177 clock-mult = <1>;
178 clocks = <&app52>;
179 };
180 /* Fast bridge clocks */
181 fast_clk: fast_clk@26M {
182 #clock-cells = <0>;
183 compatible = "stericsson,u300-syscon-clk";
184 clock-type = <1>; /* Fast */
185 clock-id = <0>;
186 clocks = <&app26>;
187 };
188 i2c0_clk: i2c0_clk@26M {
189 #clock-cells = <0>;
190 compatible = "stericsson,u300-syscon-clk";
191 clock-type = <1>; /* Fast */
192 clock-id = <1>;
193 clocks = <&fast_clk>;
194 };
195 i2c1_clk: i2c1_clk@26M {
196 #clock-cells = <0>;
197 compatible = "stericsson,u300-syscon-clk";
198 clock-type = <1>; /* Fast */
199 clock-id = <2>;
200 clocks = <&fast_clk>;
201 };
202 mmc_pclk: mmc_p_clk@26M {
203 #clock-cells = <0>;
204 compatible = "stericsson,u300-syscon-clk";
205 clock-type = <1>; /* Fast */
206 clock-id = <5>;
207 clocks = <&fast_clk>;
208 };
209 mmc_mclk: mmc_mclk {
210 #clock-cells = <0>;
211 compatible = "stericsson,u300-syscon-mclk";
212 clocks = <&mmc_pclk>;
213 };
214 spi_clk: spi_p_clk@26M {
215 #clock-cells = <0>;
216 compatible = "stericsson,u300-syscon-clk";
217 clock-type = <1>; /* Fast */
218 clock-id = <6>;
219 clocks = <&fast_clk>;
220 };
221 };
223 timer: timer@c0014000 {
224 compatible = "stericsson,u300-apptimer";
225 reg = <0xc0014000 0x1000>;
226 interrupt-parent = <&vica>;
227 interrupts = <24 25 26 27>;
228 clocks = <&apptimer_clk>;
229 };
231 gpio: gpio@c0016000 {
232 compatible = "stericsson,gpio-coh901";
233 reg = <0xc0016000 0x1000>;
234 interrupt-parent = <&vicb>;
235 interrupts = <0 1 2 18 21 22 23>;
236 clocks = <&gpio_clk>;
237 interrupt-names = "gpio0", "gpio1", "gpio2", "gpio3",
238 "gpio4", "gpio5", "gpio6";
239 interrupt-controller;
240 #interrupt-cells = <2>;
241 gpio-controller;
242 #gpio-cells = <2>;
243 };
245 pinctrl: pinctrl@c0011000 {
246 compatible = "stericsson,pinctrl-u300";
247 reg = <0xc0011000 0x1000>;
248 };
250 watchdog: watchdog@c0012000 {
251 compatible = "stericsson,coh901327";
252 reg = <0xc0012000 0x1000>;
253 interrupt-parent = <&vicb>;
254 interrupts = <3>;
255 clocks = <&clk32>;
256 };
258 rtc: rtc@c0017000 {
259 compatible = "stericsson,coh901331";
260 reg = <0xc0017000 0x1000>;
261 interrupt-parent = <&vicb>;
262 interrupts = <10>;
263 clocks = <&rtc_clk>;
264 };
266 dmac: dma-controller@c00020000 {
267 compatible = "stericsson,coh901318";
268 reg = <0xc0020000 0x1000>;
269 interrupt-parent = <&vica>;
270 interrupts = <2>;
271 #dma-cells = <1>;
272 dma-channels = <40>;
273 clocks = <&dmac_clk>;
274 };
276 /* A NAND flash of 128 MiB */
277 fsmc: flash@40000000 {
278 compatible = "stericsson,fsmc-nand";
279 #address-cells = <1>;
280 #size-cells = <1>;
281 reg = <0x9f800000 0x1000>, /* FSMC Register*/
282 <0x80000000 0x4000>, /* NAND Base DATA */
283 <0x80020000 0x4000>, /* NAND Base ADDR */
284 <0x80010000 0x4000>; /* NAND Base CMD */
285 reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
286 nand-skip-bbtscan;
287 clocks = <&fsmc_clk>;
289 partition@0 {
290 label = "boot records";
291 reg = <0x0 0x20000>;
292 };
293 partition@20000 {
294 label = "free";
295 reg = <0x20000 0x7e0000>;
296 };
297 partition@800000 {
298 label = "platform";
299 reg = <0x800000 0xf800000>;
300 };
301 };
303 i2c0: i2c@c0004000 {
304 compatible = "st,ddci2c";
305 reg = <0xc0004000 0x1000>;
306 interrupt-parent = <&vicb>;
307 interrupts = <8>;
308 clocks = <&i2c0_clk>;
309 #address-cells = <1>;
310 #size-cells = <0>;
311 ab3100: ab3100@48 {
312 compatible = "stericsson,ab3100";
313 reg = <0x48>;
314 interrupt-parent = <&vica>;
315 interrupts = <0>; /* EXT0 IRQ */
316 ab3100-regulators {
317 compatible = "stericsson,ab3100-regulators";
318 ab3100_ldo_a_reg: ab3100_ldo_a {
319 startup-delay-us = <200>;
320 regulator-always-on;
321 regulator-boot-on;
322 };
323 ab3100_ldo_c_reg: ab3100_ldo_c {
324 startup-delay-us = <200>;
325 };
326 ab3100_ldo_d_reg: ab3100_ldo_d {
327 startup-delay-us = <200>;
328 };
329 ab3100_ldo_e_reg: ab3100_ldo_e {
330 regulator-min-microvolt = <1800000>;
331 regulator-max-microvolt = <1800000>;
332 startup-delay-us = <200>;
333 regulator-always-on;
334 regulator-boot-on;
335 };
336 ab3100_ldo_f_reg: ab3100_ldo_f {
337 regulator-min-microvolt = <2500000>;
338 regulator-max-microvolt = <2500000>;
339 startup-delay-us = <600>;
340 regulator-always-on;
341 regulator-boot-on;
342 };
343 ab3100_ldo_g_reg: ab3100_ldo_g {
344 regulator-min-microvolt = <1500000>;
345 regulator-max-microvolt = <2850000>;
346 startup-delay-us = <400>;
347 };
348 ab3100_ldo_h_reg: ab3100_ldo_h {
349 regulator-min-microvolt = <1200000>;
350 regulator-max-microvolt = <2750000>;
351 startup-delay-us = <200>;
352 };
353 ab3100_ldo_k_reg: ab3100_ldo_k {
354 regulator-min-microvolt = <1800000>;
355 regulator-max-microvolt = <2750000>;
356 startup-delay-us = <200>;
357 };
358 ab3100_ext_reg: ab3100_ext {
359 };
360 ab3100_buck_reg: ab3100_buck {
361 regulator-min-microvolt = <1200000>;
362 regulator-max-microvolt = <1800000>;
363 startup-delay-us = <1000>;
364 regulator-always-on;
365 regulator-boot-on;
366 };
367 };
368 };
369 };
371 i2c1: i2c@c0005000 {
372 compatible = "st,ddci2c";
373 reg = <0xc0005000 0x1000>;
374 interrupt-parent = <&vicb>;
375 interrupts = <9>;
376 clocks = <&i2c1_clk>;
377 #address-cells = <1>;
378 #size-cells = <0>;
379 fwcam0: fwcam@10 {
380 reg = <0x10>;
381 };
382 fwcam1: fwcam@5d {
383 reg = <0x5d>;
384 };
385 };
387 amba {
388 compatible = "simple-bus";
389 #address-cells = <1>;
390 #size-cells = <1>;
391 ranges;
393 vica: interrupt-controller@a0001000 {
394 compatible = "arm,versatile-vic";
395 interrupt-controller;
396 #interrupt-cells = <1>;
397 reg = <0xa0001000 0x20>;
398 };
400 vicb: interrupt-controller@a0002000 {
401 compatible = "arm,versatile-vic";
402 interrupt-controller;
403 #interrupt-cells = <1>;
404 reg = <0xa0002000 0x20>;
405 };
407 uart0: serial@c0013000 {
408 compatible = "arm,pl011", "arm,primecell";
409 reg = <0xc0013000 0x1000>;
410 interrupt-parent = <&vica>;
411 interrupts = <22>;
412 clocks = <&uart0_clk>, <&uart0_clk>;
413 clock-names = "apb_pclk", "uart0_clk";
414 dmas = <&dmac 17 &dmac 18>;
415 dma-names = "tx", "rx";
416 };
418 uart1: serial@c0007000 {
419 compatible = "arm,pl011", "arm,primecell";
420 reg = <0xc0007000 0x1000>;
421 interrupt-parent = <&vicb>;
422 interrupts = <20>;
423 dmas = <&dmac 38 &dmac 39>;
424 dma-names = "tx", "rx";
425 };
427 mmcsd: mmcsd@c0001000 {
428 compatible = "arm,pl18x", "arm,primecell";
429 reg = <0xc0001000 0x1000>;
430 interrupt-parent = <&vicb>;
431 interrupts = <6 7>;
432 clocks = <&mmc_pclk>, <&mmc_mclk>;
433 clock-names = "apb_pclk", "mclk";
434 max-frequency = <24000000>;
435 bus-width = <4>; // SD-card slot
436 cap-mmc-highspeed;
437 cap-sd-highspeed;
438 cd-gpios = <&gpio 12 0x4>;
439 cd-inverted;
440 vmmc-supply = <&ab3100_ldo_g_reg>;
441 dmas = <&dmac 14>;
442 dma-names = "rx";
443 };
445 spi: spi@c0006000 {
446 compatible = "arm,pl022", "arm,primecell";
447 reg = <0xc0006000 0x1000>;
448 interrupt-parent = <&vica>;
449 interrupts = <23>;
450 clocks = <&spi_clk>, <&spi_clk>;
451 clock-names = "SSPCLK", "apb_pclk";
452 dmas = <&dmac 27 &dmac 28>;
453 dma-names = "tx", "rx";
454 num-cs = <3>;
455 #address-cells = <1>;
456 #size-cells = <0>;
457 spi-dummy@1 {
458 compatible = "arm,pl022-dummy";
459 reg = <1>;
460 spi-max-frequency = <20000000>;
461 };
462 };
463 };
464 };