WIP FPC-III support
[linux/fpc-iii.git] / arch / arm / boot / dts / tegra20-tec.dts
blob44ced60315de1796274bc2a971f6835625a8de6c
1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "tegra20-tamonten.dtsi"
6 / {
7         model = "Avionic Design Tamonten Evaluation Carrier";
8         compatible = "ad,tec", "ad,tamonten", "nvidia,tegra20";
10         host1x@50000000 {
11                 hdmi@54280000 {
12                         status = "okay";
13                 };
14         };
16         i2c@7000c000 {
17                 wm8903: wm8903@1a {
18                         compatible = "wlf,wm8903";
19                         reg = <0x1a>;
20                         interrupt-parent = <&gpio>;
21                         interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;
23                         gpio-controller;
24                         #gpio-cells = <2>;
26                         micdet-cfg = <0>;
27                         micdet-delay = <100>;
28                         gpio-cfg = <0xffffffff
29                                     0xffffffff
30                                     0
31                                     0xffffffff
32                                     0xffffffff>;
33                 };
34         };
36         pcie@80003000 {
37                 status = "okay";
39                 pci@1,0 {
40                         status = "okay";
41                 };
42         };
44         sound {
45                 compatible = "ad,tegra-audio-wm8903-tec",
46                              "nvidia,tegra-audio-wm8903";
47                 nvidia,model = "Avionic Design TEC";
49                 nvidia,audio-routing =
50                         "Headphone Jack", "HPOUTR",
51                         "Headphone Jack", "HPOUTL",
52                         "Int Spk", "ROP",
53                         "Int Spk", "RON",
54                         "Int Spk", "LOP",
55                         "Int Spk", "LON",
56                         "Mic Jack", "MICBIAS",
57                         "IN1L", "Mic Jack";
59                 nvidia,i2s-controller = <&tegra_i2s1>;
60                 nvidia,audio-codec = <&wm8903>;
62                 nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
63                 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2)
64                         GPIO_ACTIVE_HIGH>;
66                 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
67                          <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
68                          <&tegra_car TEGRA20_CLK_CDEV1>;
69                 clock-names = "pll_a", "pll_a_out0", "mclk";
70         };
72         vcc_24v_reg: regulator@100 {
73                 compatible = "regulator-fixed";
74                 regulator-name = "vcc_24v";
75                 regulator-min-microvolt = <24000000>;
76                 regulator-max-microvolt = <24000000>;
77                 regulator-always-on;
78         };
80         vdd_5v0_reg: regulator@101 {
81                 compatible = "regulator-fixed";
82                 regulator-name = "vdd_5v0";
83                 vin-supply = <&vcc_24v_reg>;
84                 regulator-min-microvolt = <5000000>;
85                 regulator-max-microvolt = <5000000>;
86                 regulator-always-on;
87         };
89         vdd_3v3_reg: regulator@102 {
90                 compatible = "regulator-fixed";
91                 regulator-name = "vdd_3v3";
92                 vin-supply = <&vcc_24v_reg>;
93                 regulator-min-microvolt = <3300000>;
94                 regulator-max-microvolt = <3300000>;
95                 regulator-always-on;
96         };
98         vdd_1v8_reg: regulator@103 {
99                 compatible = "regulator-fixed";
100                 regulator-name = "vdd_1v8";
101                 vin-supply = <&vdd_3v3_reg>;
102                 regulator-min-microvolt = <1800000>;
103                 regulator-max-microvolt = <1800000>;
104                 regulator-always-on;
105         };