| blob | 055334ae3d2889ceb5a84a7da8723b5564027ee6 |
1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include "tegra20.dtsi"
6 #include "tegra20-cpu-opp.dtsi"
8 / {
9 model = "NVIDIA Tegra20 Ventana evaluation board";
10 compatible = "nvidia,ventana", "nvidia,tegra20";
12 aliases {
13 rtc0 = "/i2c@7000d000/tps6586x@34";
14 rtc1 = "/rtc@7000e000";
15 serial0 = &uartd;
16 };
18 chosen {
19 stdout-path = "serial0:115200n8";
20 };
22 memory@0 {
23 reg = <0x00000000 0x40000000>;
24 };
26 host1x@50000000 {
27 dc@54200000 {
28 rgb {
29 status = "okay";
31 nvidia,panel = <&panel>;
32 };
33 };
35 hdmi@54280000 {
36 status = "okay";
38 vdd-supply = <&hdmi_vdd_reg>;
39 pll-supply = <&hdmi_pll_reg>;
41 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
42 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
43 GPIO_ACTIVE_HIGH>;
44 };
45 };
47 pinmux@70000014 {
48 pinctrl-names = "default";
49 pinctrl-0 = <&state_default>;
51 state_default: pinmux {
52 ata {
53 nvidia,pins = "ata";
54 nvidia,function = "ide";
55 };
56 atb {
57 nvidia,pins = "atb", "gma", "gme";
58 nvidia,function = "sdio4";
59 };
60 atc {
61 nvidia,pins = "atc";
62 nvidia,function = "nand";
63 };
64 atd {
65 nvidia,pins = "atd", "ate", "gmb", "spia",
66 "spib", "spic";
67 nvidia,function = "gmi";
68 };
69 cdev1 {
70 nvidia,pins = "cdev1";
71 nvidia,function = "plla_out";
72 };
73 cdev2 {
74 nvidia,pins = "cdev2";
75 nvidia,function = "pllp_out4";
76 };
77 crtp {
78 nvidia,pins = "crtp", "lm1";
79 nvidia,function = "crt";
80 };
81 csus {
82 nvidia,pins = "csus";
83 nvidia,function = "vi_sensor_clk";
84 };
85 dap1 {
86 nvidia,pins = "dap1";
87 nvidia,function = "dap1";
88 };
89 dap2 {
90 nvidia,pins = "dap2";
91 nvidia,function = "dap2";
92 };
93 dap3 {
94 nvidia,pins = "dap3";
95 nvidia,function = "dap3";
96 };
97 dap4 {
98 nvidia,pins = "dap4";
99 nvidia,function = "dap4";
100 };
101 dta {
102 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
103 nvidia,function = "vi";
104 };
105 dtf {
106 nvidia,pins = "dtf";
107 nvidia,function = "i2c3";
108 };
109 gmc {
110 nvidia,pins = "gmc";
111 nvidia,function = "uartd";
112 };
113 gmd {
114 nvidia,pins = "gmd";
115 nvidia,function = "sflash";
116 };
117 gpu {
118 nvidia,pins = "gpu";
119 nvidia,function = "pwm";
120 };
121 gpu7 {
122 nvidia,pins = "gpu7";
123 nvidia,function = "rtck";
124 };
125 gpv {
126 nvidia,pins = "gpv", "slxa", "slxk";
127 nvidia,function = "pcie";
128 };
129 hdint {
130 nvidia,pins = "hdint";
131 nvidia,function = "hdmi";
132 };
133 i2cp {
134 nvidia,pins = "i2cp";
135 nvidia,function = "i2cp";
136 };
137 irrx {
138 nvidia,pins = "irrx", "irtx";
139 nvidia,function = "uartb";
140 };
141 kbca {
142 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
143 "kbce", "kbcf";
144 nvidia,function = "kbc";
145 };
146 lcsn {
147 nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",
148 "lsdi", "lvp0";
149 nvidia,function = "rsvd4";
150 };
151 ld0 {
152 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
153 "ld5", "ld6", "ld7", "ld8", "ld9",
154 "ld10", "ld11", "ld12", "ld13", "ld14",
155 "ld15", "ld16", "ld17", "ldi", "lhp0",
156 "lhp1", "lhp2", "lhs", "lpp", "lpw0",
157 "lpw2", "lsc0", "lsc1", "lsck", "lsda",
158 "lspi", "lvp1", "lvs";
159 nvidia,function = "displaya";
160 };
161 owc {
162 nvidia,pins = "owc", "spdi", "spdo", "uac";
163 nvidia,function = "rsvd2";
164 };
165 pmc {
166 nvidia,pins = "pmc";
167 nvidia,function = "pwr_on";
168 };
169 rm {
170 nvidia,pins = "rm";
171 nvidia,function = "i2c1";
172 };
173 sdb {
174 nvidia,pins = "sdb", "sdc", "sdd", "slxc";
175 nvidia,function = "sdio3";
176 };
177 sdio1 {
178 nvidia,pins = "sdio1";
179 nvidia,function = "sdio1";
180 };
181 slxd {
182 nvidia,pins = "slxd";
183 nvidia,function = "spdif";
184 };
185 spid {
186 nvidia,pins = "spid", "spie", "spif";
187 nvidia,function = "spi1";
188 };
189 spig {
190 nvidia,pins = "spig", "spih";
191 nvidia,function = "spi2_alt";
192 };
193 uaa {
194 nvidia,pins = "uaa", "uab", "uda";
195 nvidia,function = "ulpi";
196 };
197 uad {
198 nvidia,pins = "uad";
199 nvidia,function = "irda";
200 };
201 uca {
202 nvidia,pins = "uca", "ucb";
203 nvidia,function = "uartc";
204 };
205 conf_ata {
206 nvidia,pins = "ata", "atb", "atc", "atd",
207 "cdev1", "cdev2", "dap1", "dap2",
208 "dap4", "ddc", "dtf", "gma", "gmc",
209 "gme", "gpu", "gpu7", "i2cp", "irrx",
210 "irtx", "pta", "rm", "sdc", "sdd",
211 "slxc", "slxd", "slxk", "spdi", "spdo",
212 "uac", "uad", "uca", "ucb", "uda";
213 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
214 nvidia,tristate = <TEGRA_PIN_DISABLE>;
215 };
216 conf_ate {
217 nvidia,pins = "ate", "csus", "dap3", "gmd",
218 "gpv", "owc", "spia", "spib", "spic",
219 "spid", "spie", "spig";
220 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
221 nvidia,tristate = <TEGRA_PIN_ENABLE>;
222 };
223 conf_ck32 {
224 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
225 "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
226 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
227 };
228 conf_crtp {
229 nvidia,pins = "crtp", "gmb", "slxa", "spih";
230 nvidia,pull = <TEGRA_PIN_PULL_UP>;
231 nvidia,tristate = <TEGRA_PIN_ENABLE>;
232 };
233 conf_dta {
234 nvidia,pins = "dta", "dtb", "dtc", "dtd";
235 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
236 nvidia,tristate = <TEGRA_PIN_DISABLE>;
237 };
238 conf_dte {
239 nvidia,pins = "dte", "spif";
240 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
241 nvidia,tristate = <TEGRA_PIN_ENABLE>;
242 };
243 conf_hdint {
244 nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
245 "lpw1", "lsck", "lsda", "lsdi", "lvp0";
246 nvidia,tristate = <TEGRA_PIN_ENABLE>;
247 };
248 conf_kbca {
249 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
250 "kbce", "kbcf", "sdio1", "uaa", "uab";
251 nvidia,pull = <TEGRA_PIN_PULL_UP>;
252 nvidia,tristate = <TEGRA_PIN_DISABLE>;
253 };
254 conf_lc {
255 nvidia,pins = "lc", "ls";
256 nvidia,pull = <TEGRA_PIN_PULL_UP>;
257 };
258 conf_ld0 {
259 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
260 "ld5", "ld6", "ld7", "ld8", "ld9",
261 "ld10", "ld11", "ld12", "ld13", "ld14",
262 "ld15", "ld16", "ld17", "ldi", "lhp0",
263 "lhp1", "lhp2", "lhs", "lm0", "lpp",
264 "lpw0", "lpw2", "lsc0", "lsc1", "lspi",
265 "lvp1", "lvs", "pmc", "sdb";
266 nvidia,tristate = <TEGRA_PIN_DISABLE>;
267 };
268 conf_ld17_0 {
269 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
270 "ld23_22";
271 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
272 };
273 drive_sdio1 {
274 nvidia,pins = "drive_sdio1";
275 nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
276 nvidia,schmitt = <TEGRA_PIN_ENABLE>;
277 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
278 nvidia,pull-down-strength = <31>;
279 nvidia,pull-up-strength = <31>;
280 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
281 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
282 };
283 };
285 state_i2cmux_ddc: pinmux_i2cmux_ddc {
286 ddc {
287 nvidia,pins = "ddc";
288 nvidia,function = "i2c2";
289 };
290 pta {
291 nvidia,pins = "pta";
292 nvidia,function = "rsvd4";
293 };
294 };
296 state_i2cmux_pta: pinmux_i2cmux_pta {
297 ddc {
298 nvidia,pins = "ddc";
299 nvidia,function = "rsvd4";
300 };
301 pta {
302 nvidia,pins = "pta";
303 nvidia,function = "i2c2";
304 };
305 };
307 state_i2cmux_idle: pinmux_i2cmux_idle {
308 ddc {
309 nvidia,pins = "ddc";
310 nvidia,function = "rsvd4";
311 };
312 pta {
313 nvidia,pins = "pta";
314 nvidia,function = "rsvd4";
315 };
316 };
317 };
319 i2s@70002800 {
320 status = "okay";
321 };
323 serial@70006300 {
324 status = "okay";
325 };
327 pwm: pwm@7000a000 {
328 status = "okay";
329 };
331 i2c@7000c000 {
332 status = "okay";
333 clock-frequency = <400000>;
335 wm8903: wm8903@1a {
336 compatible = "wlf,wm8903";
337 reg = <0x1a>;
338 interrupt-parent = <&gpio>;
339 interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;
341 gpio-controller;
342 #gpio-cells = <2>;
344 micdet-cfg = <0>;
345 micdet-delay = <100>;
346 gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
347 };
349 /* ALS and proximity sensor */
350 isl29018@44 {
351 compatible = "isil,isl29018";
352 reg = <0x44>;
353 interrupt-parent = <&gpio>;
354 interrupts = <TEGRA_GPIO(Z, 2) IRQ_TYPE_LEVEL_HIGH>;
355 };
356 };
358 i2c@7000c400 {
359 status = "okay";
360 clock-frequency = <100000>;
361 };
363 i2cmux {
364 compatible = "i2c-mux-pinctrl";
365 #address-cells = <1>;
366 #size-cells = <0>;
368 i2c-parent = <&{/i2c@7000c400}>;
370 pinctrl-names = "ddc", "pta", "idle";
371 pinctrl-0 = <&state_i2cmux_ddc>;
372 pinctrl-1 = <&state_i2cmux_pta>;
373 pinctrl-2 = <&state_i2cmux_idle>;
375 hdmi_ddc: i2c@0 {
376 reg = <0>;
377 #address-cells = <1>;
378 #size-cells = <0>;
379 };
381 lvds_ddc: i2c@1 {
382 reg = <1>;
383 #address-cells = <1>;
384 #size-cells = <0>;
385 };
386 };
388 i2c@7000c500 {
389 status = "okay";
390 clock-frequency = <400000>;
391 };
393 i2c@7000d000 {
394 status = "okay";
395 clock-frequency = <400000>;
397 pmic: tps6586x@34 {
398 compatible = "ti,tps6586x";
399 reg = <0x34>;
400 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
402 ti,system-power-controller;
404 #gpio-cells = <2>;
405 gpio-controller;
407 sys-supply = <&vdd_5v0_reg>;
408 vin-sm0-supply = <&sys_reg>;
409 vin-sm1-supply = <&sys_reg>;
410 vin-sm2-supply = <&sys_reg>;
411 vinldo01-supply = <&sm2_reg>;
412 vinldo23-supply = <&sm2_reg>;
413 vinldo4-supply = <&sm2_reg>;
414 vinldo678-supply = <&sm2_reg>;
415 vinldo9-supply = <&sm2_reg>;
417 regulators {
418 sys_reg: sys {
419 regulator-name = "vdd_sys";
420 regulator-always-on;
421 };
423 sm0 {
424 regulator-name = "vdd_sm0,vdd_core";
425 regulator-min-microvolt = <1200000>;
426 regulator-max-microvolt = <1200000>;
427 regulator-always-on;
428 };
430 sm1 {
431 regulator-name = "vdd_sm1,vdd_cpu";
432 regulator-min-microvolt = <1000000>;
433 regulator-max-microvolt = <1000000>;
434 regulator-always-on;
435 };
437 sm2_reg: sm2 {
438 regulator-name = "vdd_sm2,vin_ldo*";
439 regulator-min-microvolt = <3700000>;
440 regulator-max-microvolt = <3700000>;
441 regulator-always-on;
442 };
444 /* LDO0 is not connected to anything */
446 ldo1 {
447 regulator-name = "vdd_ldo1,avdd_pll*";
448 regulator-min-microvolt = <1100000>;
449 regulator-max-microvolt = <1100000>;
450 regulator-always-on;
451 };
453 ldo2 {
454 regulator-name = "vdd_ldo2,vdd_rtc";
455 regulator-min-microvolt = <1200000>;
456 regulator-max-microvolt = <1200000>;
457 };
459 ldo3 {
460 regulator-name = "vdd_ldo3,avdd_usb*";
461 regulator-min-microvolt = <3300000>;
462 regulator-max-microvolt = <3300000>;
463 regulator-always-on;
464 };
466 ldo4 {
467 regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
468 regulator-min-microvolt = <1800000>;
469 regulator-max-microvolt = <1800000>;
470 regulator-always-on;
471 };
473 ldo5 {
474 regulator-name = "vdd_ldo5,vcore_mmc";
475 regulator-min-microvolt = <2850000>;
476 regulator-max-microvolt = <2850000>;
477 regulator-always-on;
478 };
480 ldo6 {
481 regulator-name = "vdd_ldo6,avdd_vdac";
482 regulator-min-microvolt = <1800000>;
483 regulator-max-microvolt = <1800000>;
484 };
486 hdmi_vdd_reg: ldo7 {
487 regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";
488 regulator-min-microvolt = <3300000>;
489 regulator-max-microvolt = <3300000>;
490 };
492 hdmi_pll_reg: ldo8 {
493 regulator-name = "vdd_ldo8,avdd_hdmi_pll";
494 regulator-min-microvolt = <1800000>;
495 regulator-max-microvolt = <1800000>;
496 };
498 ldo9 {
499 regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
500 regulator-min-microvolt = <2850000>;
501 regulator-max-microvolt = <2850000>;
502 regulator-always-on;
503 };
505 ldo_rtc {
506 regulator-name = "vdd_rtc_out,vdd_cell";
507 regulator-min-microvolt = <3300000>;
508 regulator-max-microvolt = <3300000>;
509 regulator-always-on;
510 };
511 };
512 };
514 temperature-sensor@4c {
515 compatible = "onnn,nct1008";
516 reg = <0x4c>;
517 };
518 };
520 pmc@7000e400 {
521 nvidia,invert-interrupt;
522 nvidia,suspend-mode = <1>;
523 nvidia,cpu-pwr-good-time = <2000>;
524 nvidia,cpu-pwr-off-time = <100>;
525 nvidia,core-pwr-good-time = <3845 3845>;
526 nvidia,core-pwr-off-time = <458>;
527 nvidia,sys-clock-req-active-high;
528 };
530 usb@c5000000 {
531 status = "okay";
532 };
534 usb-phy@c5000000 {
535 status = "okay";
536 };
538 usb@c5004000 {
539 status = "okay";
540 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
541 GPIO_ACTIVE_LOW>;
542 };
544 usb-phy@c5004000 {
545 status = "okay";
546 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
547 GPIO_ACTIVE_LOW>;
548 };
550 usb@c5008000 {
551 status = "okay";
552 };
554 usb-phy@c5008000 {
555 status = "okay";
556 };
558 mmc@c8000000 {
559 status = "okay";
560 power-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
561 bus-width = <4>;
562 keep-power-in-suspend;
563 };
565 mmc@c8000400 {
566 status = "okay";
567 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
568 wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
569 power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
570 bus-width = <4>;
571 };
573 mmc@c8000600 {
574 status = "okay";
575 bus-width = <8>;
576 non-removable;
577 };
579 backlight: backlight {
580 compatible = "pwm-backlight";
582 enable-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
583 power-supply = <&vdd_bl_reg>;
584 pwms = <&pwm 2 5000000>;
586 brightness-levels = <0 4 8 16 32 64 128 255>;
587 default-brightness-level = <6>;
588 };
590 clk32k_in: clock@0 {
591 compatible = "fixed-clock";
592 clock-frequency = <32768>;
593 #clock-cells = <0>;
594 };
596 cpus {
597 cpu0: cpu@0 {
598 operating-points-v2 = <&cpu0_opp_table>;
599 };
601 cpu@1 {
602 operating-points-v2 = <&cpu0_opp_table>;
603 };
604 };
606 gpio-keys {
607 compatible = "gpio-keys";
609 power {
610 label = "Power";
611 gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
612 linux,code = <KEY_POWER>;
613 wakeup-source;
614 };
615 };
617 panel: panel {
618 compatible = "chunghwa,claa101wa01a";
620 power-supply = <&vdd_pnl_reg>;
621 enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
623 backlight = <&backlight>;
624 ddc-i2c-bus = <&lvds_ddc>;
625 };
627 vdd_5v0_reg: regulator@0 {
628 compatible = "regulator-fixed";
629 regulator-name = "vdd_5v0";
630 regulator-min-microvolt = <5000000>;
631 regulator-max-microvolt = <5000000>;
632 regulator-always-on;
633 };
635 regulator@1 {
636 compatible = "regulator-fixed";
637 regulator-name = "vdd_1v5";
638 regulator-min-microvolt = <1500000>;
639 regulator-max-microvolt = <1500000>;
640 gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
641 };
643 regulator@2 {
644 compatible = "regulator-fixed";
645 regulator-name = "vdd_1v2";
646 regulator-min-microvolt = <1200000>;
647 regulator-max-microvolt = <1200000>;
648 gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
649 enable-active-high;
650 };
652 vdd_pnl_reg: regulator@3 {
653 compatible = "regulator-fixed";
654 regulator-name = "vdd_pnl";
655 regulator-min-microvolt = <2800000>;
656 regulator-max-microvolt = <2800000>;
657 gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
658 enable-active-high;
659 };
661 vdd_bl_reg: regulator@4 {
662 compatible = "regulator-fixed";
663 regulator-name = "vdd_bl";
664 regulator-min-microvolt = <2800000>;
665 regulator-max-microvolt = <2800000>;
666 gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>;
667 enable-active-high;
668 };
670 sound {
671 compatible = "nvidia,tegra-audio-wm8903-ventana",
672 "nvidia,tegra-audio-wm8903";
673 nvidia,model = "NVIDIA Tegra Ventana";
675 nvidia,audio-routing =
676 "Headphone Jack", "HPOUTR",
677 "Headphone Jack", "HPOUTL",
678 "Int Spk", "ROP",
679 "Int Spk", "RON",
680 "Int Spk", "LOP",
681 "Int Spk", "LON",
682 "Mic Jack", "MICBIAS",
683 "IN1L", "Mic Jack";
685 nvidia,i2s-controller = <&tegra_i2s1>;
686 nvidia,audio-codec = <&wm8903>;
688 nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
689 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>;
690 nvidia,int-mic-en-gpios = <&gpio TEGRA_GPIO(X, 0)
691 GPIO_ACTIVE_HIGH>;
692 nvidia,ext-mic-en-gpios = <&gpio TEGRA_GPIO(X, 1)
693 GPIO_ACTIVE_HIGH>;
695 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
696 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
697 <&tegra_car TEGRA20_CLK_CDEV1>;
698 clock-names = "pll_a", "pll_a_out0", "mclk";
699 };
700 };