arch/arm/mach-integrator/integrator_ap.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  *  linux/arch/arm/mach-integrator/integrator_ap.c
   4  *
   5  *  Copyright (C) 2000-2003 Deep Blue Solutions Ltd
   6  */
   7 #include <linux/kernel.h>
   8 #include <linux/init.h>
   9 #include <linux/syscore_ops.h>
  10 #include <linux/amba/bus.h>
  11 #include <linux/io.h>
  12 #include <linux/irqchip.h>
  13 #include <linux/of_irq.h>
  14 #include <linux/of_address.h>
  15 #include <linux/of_platform.h>
  16 #include <linux/termios.h>
  17 #include <linux/mfd/syscon.h>
  18 #include <linux/regmap.h>
  19
  20 #include <asm/mach/arch.h>
  21 #include <asm/mach/map.h>
  22
  23 #include "hardware.h"
  24 #include "cm.h"
  25 #include "common.h"
  26
  27 /* Regmap to the AP system controller */
  28 static struct regmap *ap_syscon_map;
  29
  30 /*
  31  * All IO addresses are mapped onto VA 0xFFFx.xxxx, where x.xxxx
  32  * is the (PA >> 12).
  33  *
  34  * Setup a VA for the Integrator interrupt controller (for header #0,
  35  * just for now).
  36  */
  37 #define VA_IC_BASE      __io_address(INTEGRATOR_IC_BASE)
  38
  39 /*
  40  * Logical      Physical
  41  * f1400000     14000000        Interrupt controller
  42  * f1600000     16000000        UART 0
  43  */
  44
  45 static struct map_desc ap_io_desc[] __initdata __maybe_unused = {
  46         {
  47                 .virtual        = IO_ADDRESS(INTEGRATOR_IC_BASE),
  48                 .pfn            = __phys_to_pfn(INTEGRATOR_IC_BASE),
  49                 .length         = SZ_4K,
  50                 .type           = MT_DEVICE
  51         }, {
  52                 .virtual        = IO_ADDRESS(INTEGRATOR_UART0_BASE),
  53                 .pfn            = __phys_to_pfn(INTEGRATOR_UART0_BASE),
  54                 .length         = SZ_4K,
  55                 .type           = MT_DEVICE
  56         }
  57 };
  58
  59 static void __init ap_map_io(void)
  60 {
  61         iotable_init(ap_io_desc, ARRAY_SIZE(ap_io_desc));
  62 }
  63
  64 #ifdef CONFIG_PM
  65 static unsigned long ic_irq_enable;
  66
  67 static int irq_suspend(void)
  68 {
  69         ic_irq_enable = readl(VA_IC_BASE + IRQ_ENABLE);
  70         return 0;
  71 }
  72
  73 static void irq_resume(void)
  74 {
  75         /* disable all irq sources */
  76         cm_clear_irqs();
  77         writel(-1, VA_IC_BASE + IRQ_ENABLE_CLEAR);
  78         writel(-1, VA_IC_BASE + FIQ_ENABLE_CLEAR);
  79
  80         writel(ic_irq_enable, VA_IC_BASE + IRQ_ENABLE_SET);
  81 }
  82 #else
  83 #define irq_suspend NULL
  84 #define irq_resume NULL
  85 #endif
  86
  87 static struct syscore_ops irq_syscore_ops = {
  88         .suspend        = irq_suspend,
  89         .resume         = irq_resume,
  90 };
  91
  92 static int __init irq_syscore_init(void)
  93 {
  94         register_syscore_ops(&irq_syscore_ops);
  95
  96         return 0;
  97 }
  98
  99 device_initcall(irq_syscore_init);
 100
 101 /*
 102  * For the PL010 found in the Integrator/AP some of the UART control is
 103  * implemented in the system controller and accessed using a callback
 104  * from the driver.
 105  */
 106 static void integrator_uart_set_mctrl(struct amba_device *dev,
 107                                 void __iomem *base, unsigned int mctrl)
 108 {
 109         unsigned int ctrls = 0, ctrlc = 0, rts_mask, dtr_mask;
 110         u32 phybase = dev->res.start;
 111         int ret;
 112
 113         if (phybase == INTEGRATOR_UART0_BASE) {
 114                 /* UART0 */
 115                 rts_mask = 1 << 4;
 116                 dtr_mask = 1 << 5;
 117         } else {
 118                 /* UART1 */
 119                 rts_mask = 1 << 6;
 120                 dtr_mask = 1 << 7;
 121         }
 122
 123         if (mctrl & TIOCM_RTS)
 124                 ctrlc |= rts_mask;
 125         else
 126                 ctrls |= rts_mask;
 127
 128         if (mctrl & TIOCM_DTR)
 129                 ctrlc |= dtr_mask;
 130         else
 131                 ctrls |= dtr_mask;
 132
 133         ret = regmap_write(ap_syscon_map,
 134                            INTEGRATOR_SC_CTRLS_OFFSET,
 135                            ctrls);
 136         if (ret)
 137                 pr_err("MODEM: unable to write PL010 UART CTRLS\n");
 138
 139         ret = regmap_write(ap_syscon_map,
 140                            INTEGRATOR_SC_CTRLC_OFFSET,
 141                            ctrlc);
 142         if (ret)
 143                 pr_err("MODEM: unable to write PL010 UART CRTLC\n");
 144 }
 145
 146 struct amba_pl010_data ap_uart_data = {
 147         .set_mctrl = integrator_uart_set_mctrl,
 148 };
 149
 150 void __init ap_init_early(void)
 151 {
 152 }
 153
 154 static void __init ap_init_irq_of(void)
 155 {
 156         cm_init();
 157         irqchip_init();
 158 }
 159
 160 /* For the Device Tree, add in the UART callbacks as AUXDATA */
 161 static struct of_dev_auxdata ap_auxdata_lookup[] __initdata = {
 162         OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART0_BASE,
 163                 "uart0", &ap_uart_data),
 164         OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_UART1_BASE,
 165                 "uart1", &ap_uart_data),
 166         { /* sentinel */ },
 167 };
 168
 169 static const struct of_device_id ap_syscon_match[] = {
 170         { .compatible = "arm,integrator-ap-syscon"},
 171         { },
 172 };
 173
 174 static void __init ap_init_of(void)
 175 {
 176         struct device_node *syscon;
 177
 178         of_platform_default_populate(NULL, ap_auxdata_lookup, NULL);
 179
 180         syscon = of_find_matching_node(NULL, ap_syscon_match);
 181         if (!syscon)
 182                 return;
 183         ap_syscon_map = syscon_node_to_regmap(syscon);
 184         if (IS_ERR(ap_syscon_map)) {
 185                 pr_crit("could not find Integrator/AP system controller\n");
 186                 return;
 187         }
 188 }
 189
 190 static const char * ap_dt_board_compat[] = {
 191         "arm,integrator-ap",
 192         NULL,
 193 };
 194
 195 DT_MACHINE_START(INTEGRATOR_AP_DT, "ARM Integrator/AP (Device Tree)")
 196         .reserve        = integrator_reserve,
 197         .map_io         = ap_map_io,
 198         .init_early     = ap_init_early,
 199         .init_irq       = ap_init_irq_of,
 200         .init_machine   = ap_init_of,
 201         .dt_compat      = ap_dt_board_compat,
 202 MACHINE_END