WIP FPC-III support
[linux/fpc-iii.git] / arch / arm / mach-ixp4xx / avila-pci.c
blob2e5996a96dd37cb98224010282e8a6ab26b7c609
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * arch/arm/mach-ixp4xx/avila-pci.c
5 * Gateworks Avila board-level PCI initialization
7 * Author: Michael-Luke Jones <mlj28@cam.ac.uk>
9 * Based on ixdp-pci.c
10 * Copyright (C) 2002 Intel Corporation.
11 * Copyright (C) 2003-2004 MontaVista Software, Inc.
13 * Maintainer: Deepak Saxena <dsaxena@plexity.net>
16 #include <linux/kernel.h>
17 #include <linux/pci.h>
18 #include <linux/init.h>
19 #include <linux/irq.h>
20 #include <linux/delay.h>
21 #include <asm/mach/pci.h>
22 #include <asm/irq.h>
23 #include <mach/hardware.h>
24 #include <asm/mach-types.h>
26 #include "irqs.h"
28 #define AVILA_MAX_DEV 4
29 #define LOFT_MAX_DEV 6
30 #define IRQ_LINES 4
32 /* PCI controller GPIO to IRQ pin mappings */
33 #define INTA 11
34 #define INTB 10
35 #define INTC 9
36 #define INTD 8
38 void __init avila_pci_preinit(void)
40 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
41 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
42 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
43 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW);
44 ixp4xx_pci_preinit();
47 static int __init avila_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
49 static int pci_irq_table[IRQ_LINES] = {
50 IXP4XX_GPIO_IRQ(INTA),
51 IXP4XX_GPIO_IRQ(INTB),
52 IXP4XX_GPIO_IRQ(INTC),
53 IXP4XX_GPIO_IRQ(INTD)
56 if (slot >= 1 &&
57 slot <= (machine_is_loft() ? LOFT_MAX_DEV : AVILA_MAX_DEV) &&
58 pin >= 1 && pin <= IRQ_LINES)
59 return pci_irq_table[(slot + pin - 2) % 4];
61 return -1;
64 struct hw_pci avila_pci __initdata = {
65 .nr_controllers = 1,
66 .ops = &ixp4xx_ops,
67 .preinit = avila_pci_preinit,
68 .setup = ixp4xx_setup,
69 .map_irq = avila_map_irq,
72 int __init avila_pci_init(void)
74 if (machine_is_avila() || machine_is_loft())
75 pci_common_init(&avila_pci);
76 return 0;
79 subsys_initcall(avila_pci_init);