WIP FPC-III support
[linux/fpc-iii.git] / arch / arm / mach-ixp4xx / fsg-pci.c
blob4122a61aae70368d2c1c13f3258926b3739578bc
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * arch/arch/mach-ixp4xx/fsg-pci.c
5 * FSG board-level PCI initialization
7 * Author: Rod Whitby <rod@whitby.id.au>
8 * Maintainer: http://www.nslu2-linux.org/
10 * based on ixdp425-pci.c:
11 * Copyright (C) 2002 Intel Corporation.
12 * Copyright (C) 2003-2004 MontaVista Software, Inc.
15 #include <linux/pci.h>
16 #include <linux/init.h>
17 #include <linux/irq.h>
18 #include <asm/mach/pci.h>
19 #include <asm/mach-types.h>
21 #include "irqs.h"
23 #define MAX_DEV 3
24 #define IRQ_LINES 3
26 /* PCI controller GPIO to IRQ pin mappings */
27 #define INTA 6
28 #define INTB 7
29 #define INTC 5
31 void __init fsg_pci_preinit(void)
33 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
34 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
35 irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
36 ixp4xx_pci_preinit();
39 static int __init fsg_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
41 static int pci_irq_table[IRQ_LINES] = {
42 IXP4XX_GPIO_IRQ(INTC),
43 IXP4XX_GPIO_IRQ(INTB),
44 IXP4XX_GPIO_IRQ(INTA),
47 int irq = -1;
48 slot -= 11;
50 if (slot >= 1 && slot <= MAX_DEV && pin >= 1 && pin <= IRQ_LINES)
51 irq = pci_irq_table[slot - 1];
52 printk(KERN_INFO "%s: Mapped slot %d pin %d to IRQ %d\n",
53 __func__, slot, pin, irq);
55 return irq;
58 struct hw_pci fsg_pci __initdata = {
59 .nr_controllers = 1,
60 .ops = &ixp4xx_ops,
61 .preinit = fsg_pci_preinit,
62 .setup = ixp4xx_setup,
63 .map_irq = fsg_map_irq,
66 int __init fsg_pci_init(void)
68 if (machine_is_fsg())
69 pci_common_init(&fsg_pci);
70 return 0;
73 subsys_initcall(fsg_pci_init);