WIP FPC-III support
[linux/fpc-iii.git] / arch / arm / mach-ixp4xx / nas100d-setup.c
blob6959ad2e3aecc74e0b763cfdf1ca3bef7fcfaf18
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * arch/arm/mach-ixp4xx/nas100d-setup.c
5 * NAS 100d board-setup
7 * Copyright (C) 2008 Rod Whitby <rod@whitby.id.au>
9 * based on ixdp425-setup.c:
10 * Copyright (C) 2003-2004 MontaVista Software, Inc.
11 * based on nas100d-power.c:
12 * Copyright (C) 2005 Tower Technologies
13 * based on nas100d-io.c
14 * Copyright (C) 2004 Karen Spearel
16 * Author: Alessandro Zummo <a.zummo@towertech.it>
17 * Author: Rod Whitby <rod@whitby.id.au>
18 * Maintainers: http://www.nslu2-linux.org/
21 #include <linux/gpio.h>
22 #include <linux/if_ether.h>
23 #include <linux/irq.h>
24 #include <linux/jiffies.h>
25 #include <linux/timer.h>
26 #include <linux/serial.h>
27 #include <linux/serial_8250.h>
28 #include <linux/leds.h>
29 #include <linux/reboot.h>
30 #include <linux/i2c.h>
31 #include <linux/gpio/machine.h>
32 #include <linux/io.h>
33 #include <asm/mach-types.h>
34 #include <asm/mach/arch.h>
35 #include <asm/mach/flash.h>
37 #include "irqs.h"
39 #define NAS100D_SDA_PIN 5
40 #define NAS100D_SCL_PIN 6
42 /* Buttons */
43 #define NAS100D_PB_GPIO 14 /* power button */
44 #define NAS100D_RB_GPIO 4 /* reset button */
46 /* Power control */
47 #define NAS100D_PO_GPIO 12 /* power off */
49 /* LEDs */
50 #define NAS100D_LED_WLAN_GPIO 0
51 #define NAS100D_LED_DISK_GPIO 3
52 #define NAS100D_LED_PWR_GPIO 15
54 static struct flash_platform_data nas100d_flash_data = {
55 .map_name = "cfi_probe",
56 .width = 2,
59 static struct resource nas100d_flash_resource = {
60 .flags = IORESOURCE_MEM,
63 static struct platform_device nas100d_flash = {
64 .name = "IXP4XX-Flash",
65 .id = 0,
66 .dev.platform_data = &nas100d_flash_data,
67 .num_resources = 1,
68 .resource = &nas100d_flash_resource,
71 static struct i2c_board_info __initdata nas100d_i2c_board_info [] = {
73 I2C_BOARD_INFO("pcf8563", 0x51),
77 static struct gpio_led nas100d_led_pins[] = {
79 .name = "nas100d:green:wlan",
80 .gpio = NAS100D_LED_WLAN_GPIO,
81 .active_low = true,
84 .name = "nas100d:blue:power", /* (off=flashing) */
85 .gpio = NAS100D_LED_PWR_GPIO,
86 .active_low = true,
89 .name = "nas100d:yellow:disk",
90 .gpio = NAS100D_LED_DISK_GPIO,
91 .active_low = true,
95 static struct gpio_led_platform_data nas100d_led_data = {
96 .num_leds = ARRAY_SIZE(nas100d_led_pins),
97 .leds = nas100d_led_pins,
100 static struct platform_device nas100d_leds = {
101 .name = "leds-gpio",
102 .id = -1,
103 .dev.platform_data = &nas100d_led_data,
106 static struct gpiod_lookup_table nas100d_i2c_gpiod_table = {
107 .dev_id = "i2c-gpio.0",
108 .table = {
109 GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", NAS100D_SDA_PIN,
110 NULL, 0, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
111 GPIO_LOOKUP_IDX("IXP4XX_GPIO_CHIP", NAS100D_SCL_PIN,
112 NULL, 1, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
116 static struct platform_device nas100d_i2c_gpio = {
117 .name = "i2c-gpio",
118 .id = 0,
119 .dev = {
120 .platform_data = NULL,
124 static struct resource nas100d_uart_resources[] = {
126 .start = IXP4XX_UART1_BASE_PHYS,
127 .end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
128 .flags = IORESOURCE_MEM,
131 .start = IXP4XX_UART2_BASE_PHYS,
132 .end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
133 .flags = IORESOURCE_MEM,
137 static struct plat_serial8250_port nas100d_uart_data[] = {
139 .mapbase = IXP4XX_UART1_BASE_PHYS,
140 .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
141 .irq = IRQ_IXP4XX_UART1,
142 .flags = UPF_BOOT_AUTOCONF,
143 .iotype = UPIO_MEM,
144 .regshift = 2,
145 .uartclk = IXP4XX_UART_XTAL,
148 .mapbase = IXP4XX_UART2_BASE_PHYS,
149 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
150 .irq = IRQ_IXP4XX_UART2,
151 .flags = UPF_BOOT_AUTOCONF,
152 .iotype = UPIO_MEM,
153 .regshift = 2,
154 .uartclk = IXP4XX_UART_XTAL,
159 static struct platform_device nas100d_uart = {
160 .name = "serial8250",
161 .id = PLAT8250_DEV_PLATFORM,
162 .dev.platform_data = nas100d_uart_data,
163 .num_resources = 2,
164 .resource = nas100d_uart_resources,
167 /* Built-in 10/100 Ethernet MAC interfaces */
168 static struct resource nas100d_eth_resources[] = {
170 .start = IXP4XX_EthB_BASE_PHYS,
171 .end = IXP4XX_EthB_BASE_PHYS + 0x0fff,
172 .flags = IORESOURCE_MEM,
176 static struct eth_plat_info nas100d_plat_eth[] = {
178 .phy = 0,
179 .rxq = 3,
180 .txreadyq = 20,
184 static struct platform_device nas100d_eth[] = {
186 .name = "ixp4xx_eth",
187 .id = IXP4XX_ETH_NPEB,
188 .dev.platform_data = nas100d_plat_eth,
189 .num_resources = ARRAY_SIZE(nas100d_eth_resources),
190 .resource = nas100d_eth_resources,
194 static struct platform_device *nas100d_devices[] __initdata = {
195 &nas100d_i2c_gpio,
196 &nas100d_flash,
197 &nas100d_leds,
198 &nas100d_eth[0],
201 static void nas100d_power_off(void)
203 /* This causes the box to drop the power and go dead. */
205 /* enable the pwr cntl gpio and assert power off */
206 gpio_direction_output(NAS100D_PO_GPIO, 1);
209 /* This is used to make sure the power-button pusher is serious. The button
210 * must be held until the value of this counter reaches zero.
212 static int power_button_countdown;
214 /* Must hold the button down for at least this many counts to be processed */
215 #define PBUTTON_HOLDDOWN_COUNT 4 /* 2 secs */
217 static void nas100d_power_handler(struct timer_list *unused);
218 static DEFINE_TIMER(nas100d_power_timer, nas100d_power_handler);
220 static void nas100d_power_handler(struct timer_list *unused)
222 /* This routine is called twice per second to check the
223 * state of the power button.
226 if (gpio_get_value(NAS100D_PB_GPIO)) {
228 /* IO Pin is 1 (button pushed) */
229 if (power_button_countdown > 0)
230 power_button_countdown--;
232 } else {
234 /* Done on button release, to allow for auto-power-on mods. */
235 if (power_button_countdown == 0) {
236 /* Signal init to do the ctrlaltdel action,
237 * this will bypass init if it hasn't started
238 * and do a kernel_restart.
240 ctrl_alt_del();
242 /* Change the state of the power LED to "blink" */
243 gpio_set_value(NAS100D_LED_PWR_GPIO, 0);
244 } else {
245 power_button_countdown = PBUTTON_HOLDDOWN_COUNT;
249 mod_timer(&nas100d_power_timer, jiffies + msecs_to_jiffies(500));
252 static irqreturn_t nas100d_reset_handler(int irq, void *dev_id)
254 /* This is the paper-clip reset, it shuts the machine down directly. */
255 machine_power_off();
257 return IRQ_HANDLED;
260 static int __init nas100d_gpio_init(void)
262 if (!machine_is_nas100d())
263 return 0;
266 * The power button on the Iomega NAS100d is on GPIO 14, but
267 * it cannot handle interrupts on that GPIO line. So we'll
268 * have to poll it with a kernel timer.
271 /* Request the power off GPIO */
272 gpio_request(NAS100D_PO_GPIO, "power off");
274 /* Make sure that the power button GPIO is set up as an input */
275 gpio_request(NAS100D_PB_GPIO, "power button");
276 gpio_direction_input(NAS100D_PB_GPIO);
278 /* Set the initial value for the power button IRQ handler */
279 power_button_countdown = PBUTTON_HOLDDOWN_COUNT;
281 mod_timer(&nas100d_power_timer, jiffies + msecs_to_jiffies(500));
283 return 0;
285 device_initcall(nas100d_gpio_init);
287 static void __init nas100d_init(void)
289 uint8_t __iomem *f;
290 int i;
292 ixp4xx_sys_init();
294 nas100d_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
295 nas100d_flash_resource.end =
296 IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1;
298 gpiod_add_lookup_table(&nas100d_i2c_gpiod_table);
299 i2c_register_board_info(0, nas100d_i2c_board_info,
300 ARRAY_SIZE(nas100d_i2c_board_info));
303 * This is only useful on a modified machine, but it is valuable
304 * to have it first in order to see debug messages, and so that
305 * it does *not* get removed if platform_add_devices fails!
307 (void)platform_device_register(&nas100d_uart);
309 platform_add_devices(nas100d_devices, ARRAY_SIZE(nas100d_devices));
311 pm_power_off = nas100d_power_off;
313 if (request_irq(gpio_to_irq(NAS100D_RB_GPIO), &nas100d_reset_handler,
314 IRQF_TRIGGER_LOW, "NAS100D reset button", NULL) < 0) {
316 printk(KERN_DEBUG "Reset Button IRQ %d not available\n",
317 gpio_to_irq(NAS100D_RB_GPIO));
321 * Map in a portion of the flash and read the MAC address.
322 * Since it is stored in BE in the flash itself, we need to
323 * byteswap it if we're in LE mode.
325 f = ioremap(IXP4XX_EXP_BUS_BASE(0), 0x1000000);
326 if (f) {
327 for (i = 0; i < 6; i++)
328 #ifdef __ARMEB__
329 nas100d_plat_eth[0].hwaddr[i] = readb(f + 0xFC0FD8 + i);
330 #else
331 nas100d_plat_eth[0].hwaddr[i] = readb(f + 0xFC0FD8 + (i^3));
332 #endif
333 iounmap(f);
335 printk(KERN_INFO "NAS100D: Using MAC address %pM for port 0\n",
336 nas100d_plat_eth[0].hwaddr);
340 MACHINE_START(NAS100D, "Iomega NAS 100d")
341 /* Maintainer: www.nslu2-linux.org */
342 .atag_offset = 0x100,
343 .map_io = ixp4xx_map_io,
344 .init_early = ixp4xx_init_early,
345 .init_irq = ixp4xx_init_irq,
346 .init_time = ixp4xx_timer_init,
347 .init_machine = nas100d_init,
348 #if defined(CONFIG_PCI)
349 .dma_zone_size = SZ_64M,
350 #endif
351 .restart = ixp4xx_restart,
352 MACHINE_END