WIP FPC-III support
[linux/fpc-iii.git] / arch / arm / mach-s3c / mach-smdk6410.c
blobae18c1375c9c570f7b14dc1cbe119035f00e6be9
1 // SPDX-License-Identifier: GPL-2.0
2 //
3 // Copyright 2008 Openmoko, Inc.
4 // Copyright 2008 Simtec Electronics
5 // Ben Dooks <ben@simtec.co.uk>
6 // http://armlinux.simtec.co.uk/
8 #include <linux/kernel.h>
9 #include <linux/types.h>
10 #include <linux/interrupt.h>
11 #include <linux/list.h>
12 #include <linux/timer.h>
13 #include <linux/init.h>
14 #include <linux/input.h>
15 #include <linux/serial_core.h>
16 #include <linux/serial_s3c.h>
17 #include <linux/platform_device.h>
18 #include <linux/io.h>
19 #include <linux/i2c.h>
20 #include <linux/leds.h>
21 #include <linux/fb.h>
22 #include <linux/gpio.h>
23 #include <linux/delay.h>
24 #include <linux/smsc911x.h>
25 #include <linux/regulator/fixed.h>
26 #include <linux/regulator/machine.h>
27 #include <linux/pwm.h>
28 #include <linux/pwm_backlight.h>
29 #include <linux/platform_data/s3c-hsotg.h>
31 #ifdef CONFIG_SMDK6410_WM1190_EV1
32 #include <linux/mfd/wm8350/core.h>
33 #include <linux/mfd/wm8350/pmic.h>
34 #endif
36 #ifdef CONFIG_SMDK6410_WM1192_EV1
37 #include <linux/mfd/wm831x/core.h>
38 #include <linux/mfd/wm831x/pdata.h>
39 #endif
41 #include <video/platform_lcd.h>
42 #include <video/samsung_fimd.h>
44 #include <asm/mach/arch.h>
45 #include <asm/mach/map.h>
46 #include <asm/mach/irq.h>
48 #include <mach/irqs.h>
49 #include "map.h"
51 #include <asm/irq.h>
52 #include <asm/mach-types.h>
54 #include "regs-gpio.h"
55 #include "gpio-samsung.h"
56 #include <linux/platform_data/ata-samsung_cf.h>
57 #include <linux/platform_data/i2c-s3c2410.h>
58 #include "fb.h"
59 #include "gpio-cfg.h"
61 #include "devs.h"
62 #include "cpu.h"
63 #include <linux/soc/samsung/s3c-adc.h>
64 #include <linux/platform_data/touchscreen-s3c2410.h>
65 #include "keypad.h"
67 #include "backlight-s3c64xx.h"
68 #include "s3c64xx.h"
69 #include "regs-modem-s3c64xx.h"
70 #include "regs-srom-s3c64xx.h"
71 #include "regs-sys-s3c64xx.h"
73 #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
74 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
75 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
77 static struct s3c2410_uartcfg smdk6410_uartcfgs[] __initdata = {
78 [0] = {
79 .hwport = 0,
80 .flags = 0,
81 .ucon = UCON,
82 .ulcon = ULCON,
83 .ufcon = UFCON,
85 [1] = {
86 .hwport = 1,
87 .flags = 0,
88 .ucon = UCON,
89 .ulcon = ULCON,
90 .ufcon = UFCON,
92 [2] = {
93 .hwport = 2,
94 .flags = 0,
95 .ucon = UCON,
96 .ulcon = ULCON,
97 .ufcon = UFCON,
99 [3] = {
100 .hwport = 3,
101 .flags = 0,
102 .ucon = UCON,
103 .ulcon = ULCON,
104 .ufcon = UFCON,
108 /* framebuffer and LCD setup. */
110 /* GPF15 = LCD backlight control
111 * GPF13 => Panel power
112 * GPN5 = LCD nRESET signal
113 * PWM_TOUT1 => backlight brightness
116 static void smdk6410_lcd_power_set(struct plat_lcd_data *pd,
117 unsigned int power)
119 if (power) {
120 gpio_direction_output(S3C64XX_GPF(13), 1);
122 /* fire nRESET on power up */
123 gpio_direction_output(S3C64XX_GPN(5), 0);
124 msleep(10);
125 gpio_direction_output(S3C64XX_GPN(5), 1);
126 msleep(1);
127 } else {
128 gpio_direction_output(S3C64XX_GPF(13), 0);
132 static struct plat_lcd_data smdk6410_lcd_power_data = {
133 .set_power = smdk6410_lcd_power_set,
136 static struct platform_device smdk6410_lcd_powerdev = {
137 .name = "platform-lcd",
138 .dev.parent = &s3c_device_fb.dev,
139 .dev.platform_data = &smdk6410_lcd_power_data,
142 static struct s3c_fb_pd_win smdk6410_fb_win0 = {
143 .max_bpp = 32,
144 .default_bpp = 16,
145 .xres = 800,
146 .yres = 480,
147 .virtual_y = 480 * 2,
148 .virtual_x = 800,
151 static struct fb_videomode smdk6410_lcd_timing = {
152 .left_margin = 8,
153 .right_margin = 13,
154 .upper_margin = 7,
155 .lower_margin = 5,
156 .hsync_len = 3,
157 .vsync_len = 1,
158 .xres = 800,
159 .yres = 480,
162 /* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
163 static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = {
164 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
165 .vtiming = &smdk6410_lcd_timing,
166 .win[0] = &smdk6410_fb_win0,
167 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
168 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
172 * Configuring Ethernet on SMDK6410
174 * Both CS8900A and LAN9115 chips share one chip select mediated by CFG6.
175 * The constant address below corresponds to nCS1
177 * 1) Set CFGB2 p3 ON others off, no other CFGB selects "ethernet"
178 * 2) CFG6 needs to be switched to "LAN9115" side
181 static struct resource smdk6410_smsc911x_resources[] = {
182 [0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1, SZ_64K),
183 [1] = DEFINE_RES_NAMED(S3C_EINT(10), 1, NULL, IORESOURCE_IRQ \
184 | IRQ_TYPE_LEVEL_LOW),
187 static struct smsc911x_platform_config smdk6410_smsc911x_pdata = {
188 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
189 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
190 .flags = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY,
191 .phy_interface = PHY_INTERFACE_MODE_MII,
195 static struct platform_device smdk6410_smsc911x = {
196 .name = "smsc911x",
197 .id = -1,
198 .num_resources = ARRAY_SIZE(smdk6410_smsc911x_resources),
199 .resource = &smdk6410_smsc911x_resources[0],
200 .dev = {
201 .platform_data = &smdk6410_smsc911x_pdata,
205 #ifdef CONFIG_REGULATOR
206 static struct regulator_consumer_supply smdk6410_b_pwr_5v_consumers[] = {
207 REGULATOR_SUPPLY("PVDD", "0-001b"),
208 REGULATOR_SUPPLY("AVDD", "0-001b"),
211 static struct regulator_init_data __maybe_unused smdk6410_b_pwr_5v_data = {
212 .constraints = {
213 .always_on = 1,
215 .num_consumer_supplies = ARRAY_SIZE(smdk6410_b_pwr_5v_consumers),
216 .consumer_supplies = smdk6410_b_pwr_5v_consumers,
219 static struct fixed_voltage_config smdk6410_b_pwr_5v_pdata = {
220 .supply_name = "B_PWR_5V",
221 .microvolts = 5000000,
222 .init_data = &smdk6410_b_pwr_5v_data,
225 static struct platform_device smdk6410_b_pwr_5v = {
226 .name = "reg-fixed-voltage",
227 .id = -1,
228 .dev = {
229 .platform_data = &smdk6410_b_pwr_5v_pdata,
232 #endif
234 static struct s3c_ide_platdata smdk6410_ide_pdata __initdata = {
235 .setup_gpio = s3c64xx_ide_setup_gpio,
238 static uint32_t smdk6410_keymap[] __initdata = {
239 /* KEY(row, col, keycode) */
240 KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
241 KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
242 KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
243 KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
246 static struct matrix_keymap_data smdk6410_keymap_data __initdata = {
247 .keymap = smdk6410_keymap,
248 .keymap_size = ARRAY_SIZE(smdk6410_keymap),
251 static struct samsung_keypad_platdata smdk6410_keypad_data __initdata = {
252 .keymap_data = &smdk6410_keymap_data,
253 .rows = 2,
254 .cols = 8,
257 static struct map_desc smdk6410_iodesc[] = {};
259 static struct platform_device *smdk6410_devices[] __initdata = {
260 #ifdef CONFIG_SMDK6410_SD_CH0
261 &s3c_device_hsmmc0,
262 #endif
263 #ifdef CONFIG_SMDK6410_SD_CH1
264 &s3c_device_hsmmc1,
265 #endif
266 &s3c_device_i2c0,
267 &s3c_device_i2c1,
268 &s3c_device_fb,
269 &s3c_device_ohci,
270 &samsung_device_pwm,
271 &s3c_device_usb_hsotg,
272 &s3c64xx_device_iisv4,
273 &samsung_device_keypad,
275 #ifdef CONFIG_REGULATOR
276 &smdk6410_b_pwr_5v,
277 #endif
278 &smdk6410_lcd_powerdev,
280 &smdk6410_smsc911x,
281 &s3c_device_adc,
282 &s3c_device_cfcon,
283 &s3c_device_rtc,
284 &s3c_device_wdt,
287 #ifdef CONFIG_REGULATOR
288 /* ARM core */
289 static struct regulator_consumer_supply smdk6410_vddarm_consumers[] = {
290 REGULATOR_SUPPLY("vddarm", NULL),
293 /* VDDARM, BUCK1 on J5 */
294 static struct regulator_init_data __maybe_unused smdk6410_vddarm = {
295 .constraints = {
296 .name = "PVDD_ARM",
297 .min_uV = 1000000,
298 .max_uV = 1300000,
299 .always_on = 1,
300 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
302 .num_consumer_supplies = ARRAY_SIZE(smdk6410_vddarm_consumers),
303 .consumer_supplies = smdk6410_vddarm_consumers,
306 /* VDD_INT, BUCK2 on J5 */
307 static struct regulator_init_data __maybe_unused smdk6410_vddint = {
308 .constraints = {
309 .name = "PVDD_INT",
310 .min_uV = 1000000,
311 .max_uV = 1200000,
312 .always_on = 1,
313 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
317 /* VDD_HI, LDO3 on J5 */
318 static struct regulator_init_data __maybe_unused smdk6410_vddhi = {
319 .constraints = {
320 .name = "PVDD_HI",
321 .always_on = 1,
325 /* VDD_PLL, LDO2 on J5 */
326 static struct regulator_init_data __maybe_unused smdk6410_vddpll = {
327 .constraints = {
328 .name = "PVDD_PLL",
329 .always_on = 1,
333 /* VDD_UH_MMC, LDO5 on J5 */
334 static struct regulator_init_data __maybe_unused smdk6410_vdduh_mmc = {
335 .constraints = {
336 .name = "PVDD_UH+PVDD_MMC",
337 .always_on = 1,
341 /* VCCM3BT, LDO8 on J5 */
342 static struct regulator_init_data __maybe_unused smdk6410_vccmc3bt = {
343 .constraints = {
344 .name = "PVCCM3BT",
345 .always_on = 1,
349 /* VCCM2MTV, LDO11 on J5 */
350 static struct regulator_init_data __maybe_unused smdk6410_vccm2mtv = {
351 .constraints = {
352 .name = "PVCCM2MTV",
353 .always_on = 1,
357 /* VDD_LCD, LDO12 on J5 */
358 static struct regulator_init_data __maybe_unused smdk6410_vddlcd = {
359 .constraints = {
360 .name = "PVDD_LCD",
361 .always_on = 1,
365 /* VDD_OTGI, LDO9 on J5 */
366 static struct regulator_init_data __maybe_unused smdk6410_vddotgi = {
367 .constraints = {
368 .name = "PVDD_OTGI",
369 .always_on = 1,
373 /* VDD_OTG, LDO14 on J5 */
374 static struct regulator_init_data __maybe_unused smdk6410_vddotg = {
375 .constraints = {
376 .name = "PVDD_OTG",
377 .always_on = 1,
381 /* VDD_ALIVE, LDO15 on J5 */
382 static struct regulator_init_data __maybe_unused smdk6410_vddalive = {
383 .constraints = {
384 .name = "PVDD_ALIVE",
385 .always_on = 1,
389 /* VDD_AUDIO, VLDO_AUDIO on J5 */
390 static struct regulator_init_data __maybe_unused smdk6410_vddaudio = {
391 .constraints = {
392 .name = "PVDD_AUDIO",
393 .always_on = 1,
396 #endif
398 #ifdef CONFIG_SMDK6410_WM1190_EV1
399 /* S3C64xx internal logic & PLL */
400 static struct regulator_init_data __maybe_unused wm8350_dcdc1_data = {
401 .constraints = {
402 .name = "PVDD_INT+PVDD_PLL",
403 .min_uV = 1200000,
404 .max_uV = 1200000,
405 .always_on = 1,
406 .apply_uV = 1,
410 /* Memory */
411 static struct regulator_init_data __maybe_unused wm8350_dcdc3_data = {
412 .constraints = {
413 .name = "PVDD_MEM",
414 .min_uV = 1800000,
415 .max_uV = 1800000,
416 .always_on = 1,
417 .state_mem = {
418 .uV = 1800000,
419 .mode = REGULATOR_MODE_NORMAL,
420 .enabled = 1,
422 .initial_state = PM_SUSPEND_MEM,
426 /* USB, EXT, PCM, ADC/DAC, USB, MMC */
427 static struct regulator_consumer_supply wm8350_dcdc4_consumers[] = {
428 REGULATOR_SUPPLY("DVDD", "0-001b"),
431 static struct regulator_init_data __maybe_unused wm8350_dcdc4_data = {
432 .constraints = {
433 .name = "PVDD_HI+PVDD_EXT+PVDD_SYS+PVCCM2MTV",
434 .min_uV = 3000000,
435 .max_uV = 3000000,
436 .always_on = 1,
438 .num_consumer_supplies = ARRAY_SIZE(wm8350_dcdc4_consumers),
439 .consumer_supplies = wm8350_dcdc4_consumers,
442 /* OTGi/1190-EV1 HPVDD & AVDD */
443 static struct regulator_init_data __maybe_unused wm8350_ldo4_data = {
444 .constraints = {
445 .name = "PVDD_OTGI+HPVDD+AVDD",
446 .min_uV = 1200000,
447 .max_uV = 1200000,
448 .apply_uV = 1,
449 .always_on = 1,
453 static struct {
454 int regulator;
455 struct regulator_init_data *initdata;
456 } wm1190_regulators[] = {
457 { WM8350_DCDC_1, &wm8350_dcdc1_data },
458 { WM8350_DCDC_3, &wm8350_dcdc3_data },
459 { WM8350_DCDC_4, &wm8350_dcdc4_data },
460 { WM8350_DCDC_6, &smdk6410_vddarm },
461 { WM8350_LDO_1, &smdk6410_vddalive },
462 { WM8350_LDO_2, &smdk6410_vddotg },
463 { WM8350_LDO_3, &smdk6410_vddlcd },
464 { WM8350_LDO_4, &wm8350_ldo4_data },
467 static int __init smdk6410_wm8350_init(struct wm8350 *wm8350)
469 int i;
471 /* Configure the IRQ line */
472 s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
474 /* Instantiate the regulators */
475 for (i = 0; i < ARRAY_SIZE(wm1190_regulators); i++)
476 wm8350_register_regulator(wm8350,
477 wm1190_regulators[i].regulator,
478 wm1190_regulators[i].initdata);
480 return 0;
483 static struct wm8350_platform_data __initdata smdk6410_wm8350_pdata = {
484 .init = smdk6410_wm8350_init,
485 .irq_high = 1,
486 .irq_base = IRQ_BOARD_START,
488 #endif
490 #ifdef CONFIG_SMDK6410_WM1192_EV1
491 static struct gpio_led wm1192_pmic_leds[] = {
493 .name = "PMIC:red:power",
494 .gpio = GPIO_BOARD_START + 3,
495 .default_state = LEDS_GPIO_DEFSTATE_ON,
499 static struct gpio_led_platform_data wm1192_pmic_led = {
500 .num_leds = ARRAY_SIZE(wm1192_pmic_leds),
501 .leds = wm1192_pmic_leds,
504 static struct platform_device wm1192_pmic_led_dev = {
505 .name = "leds-gpio",
506 .id = -1,
507 .dev = {
508 .platform_data = &wm1192_pmic_led,
512 static int wm1192_pre_init(struct wm831x *wm831x)
514 int ret;
516 /* Configure the IRQ line */
517 s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
519 ret = platform_device_register(&wm1192_pmic_led_dev);
520 if (ret != 0)
521 dev_err(wm831x->dev, "Failed to add PMIC LED: %d\n", ret);
523 return 0;
526 static struct wm831x_backlight_pdata wm1192_backlight_pdata = {
527 .isink = 1,
528 .max_uA = 27554,
531 static struct regulator_init_data __maybe_unused wm1192_dcdc3 = {
532 .constraints = {
533 .name = "PVDD_MEM+PVDD_GPS",
534 .always_on = 1,
538 static struct regulator_consumer_supply wm1192_ldo1_consumers[] = {
539 REGULATOR_SUPPLY("DVDD", "0-001b"), /* WM8580 */
542 static struct regulator_init_data __maybe_unused wm1192_ldo1 = {
543 .constraints = {
544 .name = "PVDD_LCD+PVDD_EXT",
545 .always_on = 1,
547 .consumer_supplies = wm1192_ldo1_consumers,
548 .num_consumer_supplies = ARRAY_SIZE(wm1192_ldo1_consumers),
551 static struct wm831x_status_pdata wm1192_led7_pdata = {
552 .name = "LED7:green:",
555 static struct wm831x_status_pdata wm1192_led8_pdata = {
556 .name = "LED8:green:",
559 static struct wm831x_pdata smdk6410_wm1192_pdata = {
560 .pre_init = wm1192_pre_init,
562 .backlight = &wm1192_backlight_pdata,
563 .dcdc = {
564 &smdk6410_vddarm, /* DCDC1 */
565 &smdk6410_vddint, /* DCDC2 */
566 &wm1192_dcdc3,
568 .gpio_base = GPIO_BOARD_START,
569 .ldo = {
570 &wm1192_ldo1, /* LDO1 */
571 &smdk6410_vdduh_mmc, /* LDO2 */
572 NULL, /* LDO3 NC */
573 &smdk6410_vddotgi, /* LDO4 */
574 &smdk6410_vddotg, /* LDO5 */
575 &smdk6410_vddhi, /* LDO6 */
576 &smdk6410_vddaudio, /* LDO7 */
577 &smdk6410_vccm2mtv, /* LDO8 */
578 &smdk6410_vddpll, /* LDO9 */
579 &smdk6410_vccmc3bt, /* LDO10 */
580 &smdk6410_vddalive, /* LDO11 */
582 .status = {
583 &wm1192_led7_pdata,
584 &wm1192_led8_pdata,
587 #endif
589 static struct i2c_board_info i2c_devs0[] __initdata = {
590 { I2C_BOARD_INFO("24c08", 0x50), },
591 { I2C_BOARD_INFO("wm8580", 0x1b), },
593 #ifdef CONFIG_SMDK6410_WM1192_EV1
594 { I2C_BOARD_INFO("wm8312", 0x34),
595 .platform_data = &smdk6410_wm1192_pdata,
596 .irq = S3C_EINT(12),
598 #endif
600 #ifdef CONFIG_SMDK6410_WM1190_EV1
601 { I2C_BOARD_INFO("wm8350", 0x1a),
602 .platform_data = &smdk6410_wm8350_pdata,
603 .irq = S3C_EINT(12),
605 #endif
608 static struct i2c_board_info i2c_devs1[] __initdata = {
609 { I2C_BOARD_INFO("24c128", 0x57), }, /* Samsung S524AD0XD1 */
612 /* LCD Backlight data */
613 static struct samsung_bl_gpio_info smdk6410_bl_gpio_info = {
614 .no = S3C64XX_GPF(15),
615 .func = S3C_GPIO_SFN(2),
618 static struct pwm_lookup smdk6410_pwm_lookup[] = {
619 PWM_LOOKUP("samsung-pwm", 1, "pwm-backlight.0", NULL, 78770,
620 PWM_POLARITY_NORMAL),
623 static struct platform_pwm_backlight_data smdk6410_bl_data = {
624 /* Intentionally blank */
627 static struct dwc2_hsotg_plat smdk6410_hsotg_pdata;
629 static void __init smdk6410_map_io(void)
631 u32 tmp;
633 s3c64xx_init_io(smdk6410_iodesc, ARRAY_SIZE(smdk6410_iodesc));
634 s3c64xx_set_xtal_freq(12000000);
635 s3c24xx_init_uarts(smdk6410_uartcfgs, ARRAY_SIZE(smdk6410_uartcfgs));
636 s3c64xx_set_timer_source(S3C64XX_PWM3, S3C64XX_PWM4);
638 /* set the LCD type */
640 tmp = __raw_readl(S3C64XX_SPCON);
641 tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
642 tmp |= S3C64XX_SPCON_LCD_SEL_RGB;
643 __raw_writel(tmp, S3C64XX_SPCON);
645 /* remove the lcd bypass */
646 tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
647 tmp &= ~MIFPCON_LCD_BYPASS;
648 __raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
651 static void __init smdk6410_machine_init(void)
653 u32 cs1;
655 s3c_i2c0_set_platdata(NULL);
656 s3c_i2c1_set_platdata(NULL);
657 s3c_fb_set_platdata(&smdk6410_lcd_pdata);
658 dwc2_hsotg_set_platdata(&smdk6410_hsotg_pdata);
660 samsung_keypad_set_platdata(&smdk6410_keypad_data);
662 s3c64xx_ts_set_platdata(NULL);
664 /* configure nCS1 width to 16 bits */
666 cs1 = __raw_readl(S3C64XX_SROM_BW) &
667 ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
668 cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) |
669 (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) |
670 (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
671 S3C64XX_SROM_BW__NCS1__SHIFT;
672 __raw_writel(cs1, S3C64XX_SROM_BW);
674 /* set timing for nCS1 suitable for ethernet chip */
676 __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) |
677 (6 << S3C64XX_SROM_BCX__TACP__SHIFT) |
678 (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) |
679 (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) |
680 (0xe << S3C64XX_SROM_BCX__TACC__SHIFT) |
681 (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) |
682 (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);
684 gpio_request(S3C64XX_GPN(5), "LCD power");
685 gpio_request(S3C64XX_GPF(13), "LCD power");
687 i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
688 i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
690 s3c_ide_set_platdata(&smdk6410_ide_pdata);
692 platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices));
694 pwm_add_table(smdk6410_pwm_lookup, ARRAY_SIZE(smdk6410_pwm_lookup));
695 samsung_bl_set(&smdk6410_bl_gpio_info, &smdk6410_bl_data);
698 MACHINE_START(SMDK6410, "SMDK6410")
699 /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
700 .atag_offset = 0x100,
701 .nr_irqs = S3C64XX_NR_IRQS,
702 .init_irq = s3c6410_init_irq,
703 .map_io = smdk6410_map_io,
704 .init_machine = smdk6410_machine_init,
705 .init_time = s3c64xx_timer_init,
706 MACHINE_END