WIP FPC-III support
[linux/fpc-iii.git] / arch / arm / mach-tegra / irammap.h
bloba945a1c38aa50a640d69260c19e0f0d9e1992e0e
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved.
4 */
6 #ifndef __MACH_TEGRA_IRAMMAP_H
7 #define __MACH_TEGRA_IRAMMAP_H
9 #include <linux/sizes.h>
11 /* The first 1K of IRAM is permanently reserved for the CPU reset handler */
12 #define TEGRA_IRAM_RESET_HANDLER_OFFSET 0
13 #define TEGRA_IRAM_RESET_HANDLER_SIZE SZ_1K
16 * This area is used for LPx resume vector, only while LPx power state is
17 * active. At other times, the AVP may use this area for arbitrary purposes
19 #define TEGRA_IRAM_LPx_RESUME_AREA (TEGRA_IRAM_BASE + SZ_4K)
21 #endif