1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/arch/arm/mm/tlbv4.S
5 * Copyright (C) 1997-2002 Russell King
7 * ARM architecture version 4 TLB handling functions.
8 * These assume a split I/D TLBs, and no write buffer.
12 #include <linux/linkage.h>
13 #include <linux/init.h>
14 #include <asm/assembler.h>
15 #include <asm/asm-offsets.h>
16 #include <asm/tlbflush.h>
17 #include "proc-macros.S"
21 * v4_flush_user_tlb_range(start, end, mm)
23 * Invalidate a range of TLB entries in the specified user address space.
25 * - start - range start address
26 * - end - range end address
27 * - mm - mm_struct describing address space
30 ENTRY(v4_flush_user_tlb_range)
32 act_mm r3 @ get current->active_mm
33 eors r3, ip, r3 @ == mm ?
34 retne lr @ no, we dont do anything
35 .v4_flush_kern_tlb_range:
38 1: mcr p15, 0, r0, c8, c7, 1 @ invalidate TLB entry
45 * v4_flush_kern_tlb_range(start, end)
47 * Invalidate a range of TLB entries in the specified kernel
50 * - start - virtual address (may not be aligned)
51 * - end - virtual address (may not be aligned)
53 .globl v4_flush_kern_tlb_range
54 .equ v4_flush_kern_tlb_range, .v4_flush_kern_tlb_range
58 /* define struct cpu_tlb_fns (see <asm/tlbflush.h> and proc-macros.S) */
59 define_tlb_functions v4, v4_tlb_flags