arch/arm64/boot/dts/amlogic/meson-sm1.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Copyright (c) 2019 BayLibre, SAS
   4  * Author: Neil Armstrong <narmstrong@baylibre.com>
   5  */
   6
   7 #include "meson-g12-common.dtsi"
   8 #include <dt-bindings/clock/axg-audio-clkc.h>
   9 #include <dt-bindings/power/meson-sm1-power.h>
  10 #include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
  11 #include <dt-bindings/reset/amlogic,meson-g12a-audio-reset.h>
  12
  13 / {
  14         compatible = "amlogic,sm1";
  15
  16         tdmif_a: audio-controller-0 {
  17                 compatible = "amlogic,axg-tdm-iface";
  18                 #sound-dai-cells = <0>;
  19                 sound-name-prefix = "TDM_A";
  20                 clocks = <&clkc_audio AUD_CLKID_MST_A_MCLK>,
  21                          <&clkc_audio AUD_CLKID_MST_A_SCLK>,
  22                          <&clkc_audio AUD_CLKID_MST_A_LRCLK>;
  23                 clock-names = "mclk", "sclk", "lrclk";
  24                 status = "disabled";
  25         };
  26
  27         tdmif_b: audio-controller-1 {
  28                 compatible = "amlogic,axg-tdm-iface";
  29                 #sound-dai-cells = <0>;
  30                 sound-name-prefix = "TDM_B";
  31                 clocks = <&clkc_audio AUD_CLKID_MST_B_MCLK>,
  32                          <&clkc_audio AUD_CLKID_MST_B_SCLK>,
  33                          <&clkc_audio AUD_CLKID_MST_B_LRCLK>;
  34                 clock-names = "mclk", "sclk", "lrclk";
  35                 status = "disabled";
  36         };
  37
  38         tdmif_c: audio-controller-2 {
  39                 compatible = "amlogic,axg-tdm-iface";
  40                 #sound-dai-cells = <0>;
  41                 sound-name-prefix = "TDM_C";
  42                 clocks = <&clkc_audio AUD_CLKID_MST_C_MCLK>,
  43                          <&clkc_audio AUD_CLKID_MST_C_SCLK>,
  44                          <&clkc_audio AUD_CLKID_MST_C_LRCLK>;
  45                 clock-names = "mclk", "sclk", "lrclk";
  46                 status = "disabled";
  47         };
  48
  49         cpus {
  50                 #address-cells = <0x2>;
  51                 #size-cells = <0x0>;
  52
  53                 cpu0: cpu@0 {
  54                         device_type = "cpu";
  55                         compatible = "arm,cortex-a55";
  56                         reg = <0x0 0x0>;
  57                         enable-method = "psci";
  58                         next-level-cache = <&l2>;
  59                         #cooling-cells = <2>;
  60                 };
  61
  62                 cpu1: cpu@1 {
  63                         device_type = "cpu";
  64                         compatible = "arm,cortex-a55";
  65                         reg = <0x0 0x1>;
  66                         enable-method = "psci";
  67                         next-level-cache = <&l2>;
  68                         #cooling-cells = <2>;
  69                 };
  70
  71                 cpu2: cpu@2 {
  72                         device_type = "cpu";
  73                         compatible = "arm,cortex-a55";
  74                         reg = <0x0 0x2>;
  75                         enable-method = "psci";
  76                         next-level-cache = <&l2>;
  77                         #cooling-cells = <2>;
  78                 };
  79
  80                 cpu3: cpu@3 {
  81                         device_type = "cpu";
  82                         compatible = "arm,cortex-a55";
  83                         reg = <0x0 0x3>;
  84                         enable-method = "psci";
  85                         next-level-cache = <&l2>;
  86                         #cooling-cells = <2>;
  87                 };
  88
  89                 l2: l2-cache0 {
  90                         compatible = "cache";
  91                 };
  92         };
  93
  94         cpu_opp_table: opp-table {
  95                 compatible = "operating-points-v2";
  96                 opp-shared;
  97
  98                 opp-100000000 {
  99                         opp-hz = /bits/ 64 <100000000>;
 100                         opp-microvolt = <730000>;
 101                 };
 102
 103                 opp-250000000 {
 104                         opp-hz = /bits/ 64 <250000000>;
 105                         opp-microvolt = <730000>;
 106                 };
 107
 108                 opp-500000000 {
 109                         opp-hz = /bits/ 64 <500000000>;
 110                         opp-microvolt = <730000>;
 111                 };
 112
 113                 opp-667000000 {
 114                         opp-hz = /bits/ 64 <666666666>;
 115                         opp-microvolt = <750000>;
 116                 };
 117
 118                 opp-1000000000 {
 119                         opp-hz = /bits/ 64 <1000000000>;
 120                         opp-microvolt = <770000>;
 121                 };
 122
 123                 opp-1200000000 {
 124                         opp-hz = /bits/ 64 <1200000000>;
 125                         opp-microvolt = <780000>;
 126                 };
 127
 128                 opp-1404000000 {
 129                         opp-hz = /bits/ 64 <1404000000>;
 130                         opp-microvolt = <790000>;
 131                 };
 132
 133                 opp-1500000000 {
 134                         opp-hz = /bits/ 64 <1500000000>;
 135                         opp-microvolt = <800000>;
 136                 };
 137
 138                 opp-1608000000 {
 139                         opp-hz = /bits/ 64 <1608000000>;
 140                         opp-microvolt = <810000>;
 141                 };
 142
 143                 opp-1704000000 {
 144                         opp-hz = /bits/ 64 <1704000000>;
 145                         opp-microvolt = <850000>;
 146                 };
 147
 148                 opp-1800000000 {
 149                         opp-hz = /bits/ 64 <1800000000>;
 150                         opp-microvolt = <900000>;
 151                 };
 152
 153                 opp-1908000000 {
 154                         opp-hz = /bits/ 64 <1908000000>;
 155                         opp-microvolt = <950000>;
 156                 };
 157         };
 158 };
 159
 160 &apb {
 161         audio: bus@60000 {
 162                 compatible = "simple-bus";
 163                 reg = <0x0 0x60000 0x0 0x1000>;
 164                 #address-cells = <2>;
 165                 #size-cells = <2>;
 166                 ranges = <0x0 0x0 0x0 0x60000 0x0 0x1000>;
 167
 168                 clkc_audio: clock-controller@0 {
 169                         status = "disabled";
 170                         compatible = "amlogic,sm1-audio-clkc";
 171                         reg = <0x0 0x0 0x0 0xb4>;
 172                         #clock-cells = <1>;
 173                         #reset-cells = <1>;
 174
 175                         clocks = <&clkc CLKID_AUDIO>,
 176                                  <&clkc CLKID_MPLL0>,
 177                                  <&clkc CLKID_MPLL1>,
 178                                  <&clkc CLKID_MPLL2>,
 179                                  <&clkc CLKID_MPLL3>,
 180                                  <&clkc CLKID_HIFI_PLL>,
 181                                  <&clkc CLKID_FCLK_DIV3>,
 182                                  <&clkc CLKID_FCLK_DIV4>,
 183                                  <&clkc CLKID_FCLK_DIV5>;
 184                         clock-names = "pclk",
 185                                       "mst_in0",
 186                                       "mst_in1",
 187                                       "mst_in2",
 188                                       "mst_in3",
 189                                       "mst_in4",
 190                                       "mst_in5",
 191                                       "mst_in6",
 192                                       "mst_in7";
 193
 194                         resets = <&reset RESET_AUDIO>;
 195                 };
 196
 197                 toddr_a: audio-controller@100 {
 198                         compatible = "amlogic,sm1-toddr",
 199                                      "amlogic,axg-toddr";
 200                         reg = <0x0 0x100 0x0 0x2c>;
 201                         #sound-dai-cells = <0>;
 202                         sound-name-prefix = "TODDR_A";
 203                         interrupts = <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>;
 204                         clocks = <&clkc_audio AUD_CLKID_TODDR_A>;
 205                         resets = <&arb AXG_ARB_TODDR_A>,
 206                                  <&clkc_audio AUD_RESET_TODDR_A>;
 207                         reset-names = "arb", "rst";
 208                         amlogic,fifo-depth = <8192>;
 209                         status = "disabled";
 210                 };
 211
 212                 toddr_b: audio-controller@140 {
 213                         compatible = "amlogic,sm1-toddr",
 214                                      "amlogic,axg-toddr";
 215                         reg = <0x0 0x140 0x0 0x2c>;
 216                         #sound-dai-cells = <0>;
 217                         sound-name-prefix = "TODDR_B";
 218                         interrupts = <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>;
 219                         clocks = <&clkc_audio AUD_CLKID_TODDR_B>;
 220                         resets = <&arb AXG_ARB_TODDR_B>,
 221                                  <&clkc_audio AUD_RESET_TODDR_B>;
 222                         reset-names = "arb", "rst";
 223                         amlogic,fifo-depth = <256>;
 224                         status = "disabled";
 225                 };
 226
 227                 toddr_c: audio-controller@180 {
 228                         compatible = "amlogic,sm1-toddr",
 229                                      "amlogic,axg-toddr";
 230                         reg = <0x0 0x180 0x0 0x2c>;
 231                         #sound-dai-cells = <0>;
 232                         sound-name-prefix = "TODDR_C";
 233                         interrupts = <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>;
 234                         clocks = <&clkc_audio AUD_CLKID_TODDR_C>;
 235                         resets = <&arb AXG_ARB_TODDR_C>,
 236                                  <&clkc_audio AUD_RESET_TODDR_C>;
 237                         reset-names = "arb", "rst";
 238                         amlogic,fifo-depth = <256>;
 239                         status = "disabled";
 240                 };
 241
 242                 frddr_a: audio-controller@1c0 {
 243                         compatible = "amlogic,sm1-frddr",
 244                                      "amlogic,axg-frddr";
 245                         reg = <0x0 0x1c0 0x0 0x2c>;
 246                         #sound-dai-cells = <0>;
 247                         sound-name-prefix = "FRDDR_A";
 248                         interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>;
 249                         clocks = <&clkc_audio AUD_CLKID_FRDDR_A>;
 250                         resets = <&arb AXG_ARB_FRDDR_A>,
 251                                  <&clkc_audio AUD_RESET_FRDDR_A>;
 252                         reset-names = "arb", "rst";
 253                         amlogic,fifo-depth = <512>;
 254                         status = "disabled";
 255                 };
 256
 257                 frddr_b: audio-controller@200 {
 258                         compatible = "amlogic,sm1-frddr",
 259                                      "amlogic,axg-frddr";
 260                         reg = <0x0 0x200 0x0 0x2c>;
 261                         #sound-dai-cells = <0>;
 262                         sound-name-prefix = "FRDDR_B";
 263                         interrupts = <GIC_SPI 153 IRQ_TYPE_EDGE_RISING>;
 264                         clocks = <&clkc_audio AUD_CLKID_FRDDR_B>;
 265                         resets = <&arb AXG_ARB_FRDDR_B>,
 266                                  <&clkc_audio AUD_RESET_FRDDR_B>;
 267                         reset-names = "arb", "rst";
 268                         amlogic,fifo-depth = <256>;
 269                         status = "disabled";
 270                 };
 271
 272                 frddr_c: audio-controller@240 {
 273                         compatible = "amlogic,sm1-frddr",
 274                                      "amlogic,axg-frddr";
 275                         reg = <0x0 0x240 0x0 0x2c>;
 276                         #sound-dai-cells = <0>;
 277                         sound-name-prefix = "FRDDR_C";
 278                         interrupts = <GIC_SPI 154 IRQ_TYPE_EDGE_RISING>;
 279                         clocks = <&clkc_audio AUD_CLKID_FRDDR_C>;
 280                         resets = <&arb AXG_ARB_FRDDR_C>,
 281                                  <&clkc_audio AUD_RESET_FRDDR_C>;
 282                         reset-names = "arb", "rst";
 283                         amlogic,fifo-depth = <256>;
 284                         status = "disabled";
 285                 };
 286
 287                 arb: reset-controller@280 {
 288                         status = "disabled";
 289                         compatible = "amlogic,meson-sm1-audio-arb";
 290                         reg = <0x0 0x280 0x0 0x4>;
 291                         #reset-cells = <1>;
 292                         clocks = <&clkc_audio AUD_CLKID_DDR_ARB>;
 293                 };
 294
 295                 tdmin_a: audio-controller@300 {
 296                         compatible = "amlogic,sm1-tdmin",
 297                                      "amlogic,axg-tdmin";
 298                         reg = <0x0 0x300 0x0 0x40>;
 299                         sound-name-prefix = "TDMIN_A";
 300                         resets = <&clkc_audio AUD_RESET_TDMIN_A>;
 301                         clocks = <&clkc_audio AUD_CLKID_TDMIN_A>,
 302                                  <&clkc_audio AUD_CLKID_TDMIN_A_SCLK>,
 303                                  <&clkc_audio AUD_CLKID_TDMIN_A_SCLK_SEL>,
 304                                  <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>,
 305                                  <&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>;
 306                         clock-names = "pclk", "sclk", "sclk_sel",
 307                                       "lrclk", "lrclk_sel";
 308                         status = "disabled";
 309                 };
 310
 311                 tdmin_b: audio-controller@340 {
 312                         compatible = "amlogic,sm1-tdmin",
 313                                      "amlogic,axg-tdmin";
 314                         reg = <0x0 0x340 0x0 0x40>;
 315                         sound-name-prefix = "TDMIN_B";
 316                         resets = <&clkc_audio AUD_RESET_TDMIN_B>;
 317                         clocks = <&clkc_audio AUD_CLKID_TDMIN_B>,
 318                                  <&clkc_audio AUD_CLKID_TDMIN_B_SCLK>,
 319                                  <&clkc_audio AUD_CLKID_TDMIN_B_SCLK_SEL>,
 320                                  <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>,
 321                                  <&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>;
 322                         clock-names = "pclk", "sclk", "sclk_sel",
 323                                       "lrclk", "lrclk_sel";
 324                         status = "disabled";
 325                 };
 326
 327                 tdmin_c: audio-controller@380 {
 328                         compatible = "amlogic,sm1-tdmin",
 329                                      "amlogic,axg-tdmin";
 330                         reg = <0x0 0x380 0x0 0x40>;
 331                         sound-name-prefix = "TDMIN_C";
 332                         resets = <&clkc_audio AUD_RESET_TDMIN_C>;
 333                         clocks = <&clkc_audio AUD_CLKID_TDMIN_C>,
 334                                  <&clkc_audio AUD_CLKID_TDMIN_C_SCLK>,
 335                                  <&clkc_audio AUD_CLKID_TDMIN_C_SCLK_SEL>,
 336                                  <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>,
 337                                  <&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>;
 338                         clock-names = "pclk", "sclk", "sclk_sel",
 339                                       "lrclk", "lrclk_sel";
 340                         status = "disabled";
 341                 };
 342
 343                 tdmin_lb: audio-controller@3c0 {
 344                         compatible = "amlogic,sm1-tdmin",
 345                                      "amlogic,axg-tdmin";
 346                         reg = <0x0 0x3c0 0x0 0x40>;
 347                         sound-name-prefix = "TDMIN_LB";
 348                         resets = <&clkc_audio AUD_RESET_TDMIN_LB>;
 349                         clocks = <&clkc_audio AUD_CLKID_TDMIN_LB>,
 350                                  <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK>,
 351                                  <&clkc_audio AUD_CLKID_TDMIN_LB_SCLK_SEL>,
 352                                  <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>,
 353                                  <&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>;
 354                         clock-names = "pclk", "sclk", "sclk_sel",
 355                                       "lrclk", "lrclk_sel";
 356                         status = "disabled";
 357                 };
 358
 359                 tdmout_a: audio-controller@500 {
 360                         compatible = "amlogic,sm1-tdmout";
 361                         reg = <0x0 0x500 0x0 0x40>;
 362                         sound-name-prefix = "TDMOUT_A";
 363                         resets = <&clkc_audio AUD_RESET_TDMOUT_A>;
 364                         clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>,
 365                                  <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>,
 366                                  <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>,
 367                                  <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>,
 368                                  <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>;
 369                         clock-names = "pclk", "sclk", "sclk_sel",
 370                                       "lrclk", "lrclk_sel";
 371                         status = "disabled";
 372                 };
 373
 374                 tdmout_b: audio-controller@540 {
 375                         compatible = "amlogic,sm1-tdmout";
 376                         reg = <0x0 0x540 0x0 0x40>;
 377                         sound-name-prefix = "TDMOUT_B";
 378                         resets = <&clkc_audio AUD_RESET_TDMOUT_B>;
 379                         clocks = <&clkc_audio AUD_CLKID_TDMOUT_B>,
 380                                  <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK>,
 381                                  <&clkc_audio AUD_CLKID_TDMOUT_B_SCLK_SEL>,
 382                                  <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>,
 383                                  <&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>;
 384                         clock-names = "pclk", "sclk", "sclk_sel",
 385                                       "lrclk", "lrclk_sel";
 386                         status = "disabled";
 387                 };
 388
 389                 tdmout_c: audio-controller@580 {
 390                         compatible = "amlogic,sm1-tdmout";
 391                         reg = <0x0 0x580 0x0 0x40>;
 392                         sound-name-prefix = "TDMOUT_C";
 393                         resets = <&clkc_audio AUD_RESET_TDMOUT_C>;
 394                         clocks = <&clkc_audio AUD_CLKID_TDMOUT_C>,
 395                                  <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK>,
 396                                  <&clkc_audio AUD_CLKID_TDMOUT_C_SCLK_SEL>,
 397                                  <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>,
 398                                  <&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>;
 399                         clock-names = "pclk", "sclk", "sclk_sel",
 400                                       "lrclk", "lrclk_sel";
 401                         status = "disabled";
 402                 };
 403
 404                 tohdmitx: audio-controller@744 {
 405                         compatible = "amlogic,sm1-tohdmitx",
 406                                      "amlogic,g12a-tohdmitx";
 407                         reg = <0x0 0x744 0x0 0x4>;
 408                         #sound-dai-cells = <1>;
 409                         sound-name-prefix = "TOHDMITX";
 410                         resets = <&clkc_audio AUD_RESET_TOHDMITX>;
 411                         status = "disabled";
 412                 };
 413
 414                 toddr_d: audio-controller@840 {
 415                         compatible = "amlogic,sm1-toddr",
 416                                      "amlogic,axg-toddr";
 417                         reg = <0x0 0x840 0x0 0x2c>;
 418                         #sound-dai-cells = <0>;
 419                         sound-name-prefix = "TODDR_D";
 420                         interrupts = <GIC_SPI 49 IRQ_TYPE_EDGE_RISING>;
 421                         clocks = <&clkc_audio AUD_CLKID_TODDR_D>;
 422                         resets = <&arb AXG_ARB_TODDR_D>,
 423                                  <&clkc_audio AUD_RESET_TODDR_D>;
 424                         reset-names = "arb", "rst";
 425                         amlogic,fifo-depth = <256>;
 426                         status = "disabled";
 427                 };
 428
 429                 frddr_d: audio-controller@880 {
 430                          compatible = "amlogic,sm1-frddr",
 431                                       "amlogic,axg-frddr";
 432                         reg = <0x0 0x880 0x0 0x2c>;
 433                         #sound-dai-cells = <0>;
 434                         sound-name-prefix = "FRDDR_D";
 435                         interrupts = <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>;
 436                         clocks = <&clkc_audio AUD_CLKID_FRDDR_D>;
 437                         resets = <&arb AXG_ARB_FRDDR_D>,
 438                                  <&clkc_audio AUD_RESET_FRDDR_D>;
 439                         reset-names = "arb", "rst";
 440                         amlogic,fifo-depth = <256>;
 441                         status = "disabled";
 442                 };
 443         };
 444
 445         pdm: audio-controller@61000 {
 446                 compatible = "amlogic,sm1-pdm",
 447                              "amlogic,axg-pdm";
 448                 reg = <0x0 0x61000 0x0 0x34>;
 449                 #sound-dai-cells = <0>;
 450                 sound-name-prefix = "PDM";
 451                 clocks = <&clkc_audio AUD_CLKID_PDM>,
 452                          <&clkc_audio AUD_CLKID_PDM_DCLK>,
 453                          <&clkc_audio AUD_CLKID_PDM_SYSCLK>;
 454                 clock-names = "pclk", "dclk", "sysclk";
 455                 resets = <&clkc_audio AUD_RESET_PDM>;
 456                 status = "disabled";
 457         };
 458 };
 459
 460 &cecb_AO {
 461         compatible = "amlogic,meson-sm1-ao-cec";
 462 };
 463
 464 &clk_msr {
 465         compatible = "amlogic,meson-sm1-clk-measure";
 466 };
 467
 468
 469 &clkc {
 470         compatible = "amlogic,sm1-clkc";
 471 };
 472
 473 &cpu_thermal {
 474         cooling-maps {
 475                 map0 {
 476                         trip = <&cpu_passive>;
 477                         cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
 478                                         <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
 479                                         <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
 480                                         <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
 481                 };
 482
 483                 map1 {
 484                         trip = <&cpu_hot>;
 485                         cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
 486                                         <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
 487                                         <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
 488                                         <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
 489                 };
 490         };
 491 };
 492
 493 &ethmac {
 494         power-domains = <&pwrc PWRC_SM1_ETH_ID>;
 495 };
 496
 497 &gpio_intc {
 498         compatible = "amlogic,meson-sm1-gpio-intc",
 499                      "amlogic,meson-gpio-intc";
 500 };
 501
 502 &pcie {
 503         power-domains = <&pwrc PWRC_SM1_PCIE_ID>;
 504 };
 505
 506 &pwrc {
 507         compatible = "amlogic,meson-sm1-pwrc";
 508 };
 509
 510 &simplefb_cvbs {
 511         power-domains = <&pwrc PWRC_SM1_VPU_ID>;
 512 };
 513
 514 &simplefb_hdmi {
 515         power-domains = <&pwrc PWRC_SM1_VPU_ID>;
 516 };
 517
 518 &vdec {
 519         compatible = "amlogic,sm1-vdec";
 520 };
 521
 522 &vpu {
 523         power-domains = <&pwrc PWRC_SM1_VPU_ID>;
 524 };
 525
 526 &usb {
 527         power-domains = <&pwrc PWRC_SM1_USB_ID>;
 528 };