arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Device Tree file for NXP LS1088A RDB Board.
   4  *
   5  * Copyright 2017 NXP
   6  *
   7  * Harninder Rai <harninder.rai@nxp.com>
   8  *
   9  */
  10
  11 /dts-v1/;
  12
  13 #include "fsl-ls1088a.dtsi"
  14
  15 / {
  16         model = "LS1088A RDB Board";
  17         compatible = "fsl,ls1088a-rdb", "fsl,ls1088a";
  18 };
  19
  20 &dpmac2 {
  21         phy-handle = <&mdio2_aquantia_phy>;
  22         phy-connection-type = "10gbase-r";
  23         pcs-handle = <&pcs2>;
  24 };
  25
  26 &dpmac3 {
  27         phy-handle = <&mdio1_phy5>;
  28         phy-connection-type = "qsgmii";
  29         managed = "in-band-status";
  30         pcs-handle = <&pcs3_0>;
  31 };
  32
  33 &dpmac4 {
  34         phy-handle = <&mdio1_phy6>;
  35         phy-connection-type = "qsgmii";
  36         managed = "in-band-status";
  37         pcs-handle = <&pcs3_1>;
  38 };
  39
  40 &dpmac5 {
  41         phy-handle = <&mdio1_phy7>;
  42         phy-connection-type = "qsgmii";
  43         managed = "in-band-status";
  44         pcs-handle = <&pcs3_2>;
  45 };
  46
  47 &dpmac6 {
  48         phy-handle = <&mdio1_phy8>;
  49         phy-connection-type = "qsgmii";
  50         managed = "in-band-status";
  51         pcs-handle = <&pcs3_3>;
  52 };
  53
  54 &dpmac7 {
  55         phy-handle = <&mdio1_phy1>;
  56         phy-connection-type = "qsgmii";
  57         managed = "in-band-status";
  58         pcs-handle = <&pcs7_0>;
  59 };
  60
  61 &dpmac8 {
  62         phy-handle = <&mdio1_phy2>;
  63         phy-connection-type = "qsgmii";
  64         managed = "in-band-status";
  65         pcs-handle = <&pcs7_1>;
  66 };
  67
  68 &dpmac9 {
  69         phy-handle = <&mdio1_phy3>;
  70         phy-connection-type = "qsgmii";
  71         managed = "in-band-status";
  72         pcs-handle = <&pcs7_2>;
  73 };
  74
  75 &dpmac10 {
  76         phy-handle = <&mdio1_phy4>;
  77         phy-connection-type = "qsgmii";
  78         managed = "in-band-status";
  79         pcs-handle = <&pcs7_3>;
  80 };
  81
  82 &emdio1 {
  83         status = "okay";
  84
  85         mdio1_phy5: ethernet-phy@c {
  86                 reg = <0xc>;
  87         };
  88
  89         mdio1_phy6: ethernet-phy@d {
  90                 reg = <0xd>;
  91         };
  92
  93         mdio1_phy7: ethernet-phy@e {
  94                 reg = <0xe>;
  95         };
  96
  97         mdio1_phy8: ethernet-phy@f {
  98                 reg = <0xf>;
  99         };
 100
 101         mdio1_phy1: ethernet-phy@1c {
 102                 reg = <0x1c>;
 103         };
 104
 105         mdio1_phy2: ethernet-phy@1d {
 106                 reg = <0x1d>;
 107         };
 108
 109         mdio1_phy3: ethernet-phy@1e {
 110                 reg = <0x1e>;
 111         };
 112
 113         mdio1_phy4: ethernet-phy@1f {
 114                 reg = <0x1f>;
 115         };
 116 };
 117
 118 &emdio2 {
 119         status = "okay";
 120
 121         mdio2_aquantia_phy: ethernet-phy@0 {
 122                 compatible = "ethernet-phy-ieee802.3-c45";
 123                 reg = <0x0>;
 124         };
 125 };
 126
 127 &i2c0 {
 128         status = "okay";
 129
 130         i2c-switch@77 {
 131                 compatible = "nxp,pca9547";
 132                 reg = <0x77>;
 133                 #address-cells = <1>;
 134                 #size-cells = <0>;
 135
 136                 i2c@2 {
 137                         #address-cells = <1>;
 138                         #size-cells = <0>;
 139                         reg = <0x2>;
 140
 141                         ina220@40 {
 142                                 compatible = "ti,ina220";
 143                                 reg = <0x40>;
 144                                 shunt-resistor = <1000>;
 145                         };
 146                 };
 147
 148                 i2c@3 {
 149                         #address-cells = <1>;
 150                         #size-cells = <0>;
 151                         reg = <0x3>;
 152
 153                         temp-sensor@4c {
 154                                 compatible = "adi,adt7461a";
 155                                 reg = <0x4c>;
 156                         };
 157
 158                         rtc@51 {
 159                                 compatible = "nxp,pcf2129";
 160                                 reg = <0x51>;
 161                                 /* IRQ10_B */
 162                                 interrupts = <0 150 IRQ_TYPE_LEVEL_HIGH>;
 163                         };
 164                 };
 165         };
 166 };
 167
 168 &ifc {
 169         ranges = <0 0 0x5 0x30000000 0x00010000
 170                   2 0 0x5 0x20000000 0x00010000>;
 171         status = "okay";
 172
 173         nand@0,0 {
 174                 compatible = "fsl,ifc-nand";
 175                 reg = <0x0 0x0 0x10000>;
 176         };
 177
 178         fpga: board-control@2,0 {
 179                 compatible = "fsl,ls1088ardb-fpga", "fsl,fpga-qixis";
 180                 reg = <0x2 0x0 0x0000100>;
 181         };
 182 };
 183
 184 &duart0 {
 185         status = "okay";
 186 };
 187
 188 &duart1 {
 189         status = "okay";
 190 };
 191
 192 &esdhc {
 193         mmc-hs200-1_8v;
 194         status = "okay";
 195 };
 196
 197 &pcs_mdio2 {
 198         status = "okay";
 199 };
 200
 201 &pcs_mdio3 {
 202         status = "okay";
 203 };
 204
 205 &pcs_mdio7 {
 206         status = "okay";
 207 };
 208
 209 &qspi {
 210         status = "okay";
 211
 212         s25fs512s0: flash@0 {
 213                 compatible = "jedec,spi-nor";
 214                 #address-cells = <1>;
 215                 #size-cells = <1>;
 216                 spi-max-frequency = <50000000>;
 217                 spi-rx-bus-width = <4>;
 218                 spi-tx-bus-width = <1>;
 219                 reg = <0>;
 220         };
 221
 222         s25fs512s1: flash@1 {
 223                 compatible = "jedec,spi-nor";
 224                 #address-cells = <1>;
 225                 #size-cells = <1>;
 226                 spi-max-frequency = <50000000>;
 227                 spi-rx-bus-width = <4>;
 228                 spi-tx-bus-width = <1>;
 229                 reg = <1>;
 230         };
 231 };
 232
 233 &sata {
 234         status = "okay";
 235 };
 236
 237 &usb0 {
 238         status = "okay";
 239 };
 240
 241 &usb1 {
 242         dr_mode = "otg";
 243         status = "okay";
 244 };