arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts

   1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
   2 //
   3 // Device Tree file for LX2162AQDS
   4 //
   5 // Copyright 2020 NXP
   6
   7 /dts-v1/;
   8
   9 #include "fsl-lx2160a.dtsi"
  10
  11 / {
  12         model = "NXP Layerscape LX2162AQDS";
  13         compatible = "fsl,lx2162a-qds", "fsl,lx2160a";
  14
  15         aliases {
  16                 crypto = &crypto;
  17                 serial0 = &uart0;
  18         };
  19
  20         chosen {
  21                 stdout-path = "serial0:115200n8";
  22         };
  23
  24         sb_3v3: regulator-sb3v3 {
  25                 compatible = "regulator-fixed";
  26                 regulator-name = "LTM4619-3.3VSB";
  27                 regulator-min-microvolt = <3300000>;
  28                 regulator-max-microvolt = <3300000>;
  29         };
  30
  31         mdio-mux-1 {
  32                 compatible = "mdio-mux-multiplexer";
  33                 mux-controls = <&mux 0>;
  34                 mdio-parent-bus = <&emdio1>;
  35                 #address-cells=<1>;
  36                 #size-cells = <0>;
  37
  38                 mdio@0 { /* On-board RTL8211F PHY #1 RGMII1 */
  39                         reg = <0x00>;
  40                         #address-cells = <1>;
  41                         #size-cells = <0>;
  42
  43                         rgmii_phy1: ethernet-phy@1 {
  44                                 compatible = "ethernet-phy-id001c.c916";
  45                                 reg = <0x1>;
  46                                 eee-broken-1000t;
  47                         };
  48                 };
  49
  50                 mdio@8 { /* On-board RTL8211F PHY #2 RGMII2 */
  51                         reg = <0x8>;
  52                         #address-cells = <1>;
  53                         #size-cells = <0>;
  54
  55                         rgmii_phy2: ethernet-phy@2 {
  56                                 compatible = "ethernet-phy-id001c.c916";
  57                                 reg = <0x2>;
  58                                 eee-broken-1000t;
  59                         };
  60                 };
  61
  62                 mdio@18 { /* Slot #1 */
  63                         reg = <0x18>;
  64                         #address-cells = <1>;
  65                         #size-cells = <0>;
  66                 };
  67
  68                 mdio@19 { /* Slot #2 */
  69                         reg = <0x19>;
  70                         #address-cells = <1>;
  71                         #size-cells = <0>;
  72                 };
  73
  74                 mdio@1a { /* Slot #3 */
  75                         reg = <0x1a>;
  76                         #address-cells = <1>;
  77                         #size-cells = <0>;
  78                 };
  79
  80                 mdio@1b { /* Slot #4 */
  81                         reg = <0x1b>;
  82                         #address-cells = <1>;
  83                         #size-cells = <0>;
  84                 };
  85
  86                 mdio@1c { /* Slot #5 */
  87                         reg = <0x1c>;
  88                         #address-cells = <1>;
  89                         #size-cells = <0>;
  90                 };
  91
  92                 mdio@1d { /* Slot #6 */
  93                         reg = <0x1d>;
  94                         #address-cells = <1>;
  95                         #size-cells = <0>;
  96                 };
  97
  98                 mdio@1e { /* Slot #7 */
  99                         reg = <0x1e>;
 100                         #address-cells = <1>;
 101                         #size-cells = <0>;
 102                 };
 103
 104                 mdio@1f { /* Slot #8 */
 105                         reg = <0x1f>;
 106                         #address-cells = <1>;
 107                         #size-cells = <0>;
 108                 };
 109         };
 110
 111         mdio-mux-2 {
 112                 compatible = "mdio-mux-multiplexer";
 113                 mux-controls = <&mux 1>;
 114                 mdio-parent-bus = <&emdio2>;
 115                 #address-cells=<1>;
 116                 #size-cells = <0>;
 117
 118                 mdio@0 { /* Slot #1 (secondary EMI) */
 119                         reg = <0x00>;
 120                         #address-cells = <1>;
 121                         #size-cells = <0>;
 122                 };
 123
 124                 mdio@1 { /* Slot #2 (secondary EMI) */
 125                         reg = <0x01>;
 126                         #address-cells = <1>;
 127                         #size-cells = <0>;
 128                 };
 129
 130                 mdio@2 { /* Slot #3 (secondary EMI) */
 131                         reg = <0x02>;
 132                         #address-cells = <1>;
 133                         #size-cells = <0>;
 134                 };
 135
 136                 mdio@3 { /* Slot #4 (secondary EMI) */
 137                         reg = <0x03>;
 138                         #address-cells = <1>;
 139                         #size-cells = <0>;
 140                 };
 141
 142                 mdio@4 { /* Slot #5 (secondary EMI) */
 143                         reg = <0x04>;
 144                         #address-cells = <1>;
 145                         #size-cells = <0>;
 146                 };
 147
 148                 mdio@5 { /* Slot #6 (secondary EMI) */
 149                         reg = <0x05>;
 150                         #address-cells = <1>;
 151                         #size-cells = <0>;
 152                 };
 153
 154                 mdio@6 { /* Slot #7 (secondary EMI) */
 155                         reg = <0x06>;
 156                         #address-cells = <1>;
 157                         #size-cells = <0>;
 158                 };
 159
 160                 mdio@7 { /* Slot #8 (secondary EMI) */
 161                         reg = <0x07>;
 162                         #address-cells = <1>;
 163                         #size-cells = <0>;
 164                 };
 165         };
 166 };
 167
 168 &crypto {
 169         status = "okay";
 170 };
 171
 172 &dpmac17 {
 173         phy-handle = <&rgmii_phy1>;
 174         phy-connection-type = "rgmii-id";
 175 };
 176
 177 &dpmac18 {
 178         phy-handle = <&rgmii_phy2>;
 179         phy-connection-type = "rgmii-id";
 180 };
 181
 182 &dspi0 {
 183         status = "okay";
 184
 185         dflash0: flash@0 {
 186                 #address-cells = <1>;
 187                 #size-cells = <1>;
 188                 compatible = "jedec,spi-nor";
 189                 reg = <0>;
 190                 spi-max-frequency = <1000000>;
 191         };
 192 };
 193
 194 &dspi1 {
 195         status = "okay";
 196
 197         dflash1: flash@0 {
 198                 #address-cells = <1>;
 199                 #size-cells = <1>;
 200                 compatible = "jedec,spi-nor";
 201                 reg = <0>;
 202                 spi-max-frequency = <1000000>;
 203         };
 204 };
 205
 206 &dspi2 {
 207         status = "okay";
 208
 209         dflash2: flash@0 {
 210                 #address-cells = <1>;
 211                 #size-cells = <1>;
 212                 compatible = "jedec,spi-nor";
 213                 reg = <0>;
 214                 spi-max-frequency = <1000000>;
 215         };
 216 };
 217
 218 &emdio1 {
 219         status = "okay";
 220 };
 221
 222 &emdio2 {
 223         status = "okay";
 224 };
 225
 226 &esdhc0 {
 227         status = "okay";
 228 };
 229
 230 &esdhc1 {
 231         status = "okay";
 232 };
 233
 234 &fspi {
 235         status = "okay";
 236
 237         mt35xu512aba0: flash@0 {
 238                 #address-cells = <1>;
 239                 #size-cells = <1>;
 240                 compatible = "jedec,spi-nor";
 241                 m25p,fast-read;
 242                 spi-max-frequency = <50000000>;
 243                 reg = <0>;
 244                 spi-rx-bus-width = <8>;
 245                 spi-tx-bus-width = <8>;
 246         };
 247 };
 248
 249 &i2c0 {
 250         status = "okay";
 251
 252         fpga@66 {
 253                 compatible = "fsl,lx2160aqds-fpga", "fsl,fpga-qixis-i2c",
 254                              "simple-mfd";
 255                 reg = <0x66>;
 256
 257                 mux: mux-controller {
 258                         compatible = "reg-mux";
 259                         #mux-control-cells = <1>;
 260                         mux-reg-masks = <0x54 0xf8>, /* 0: reg 0x54, bits 7:3 */
 261                                         <0x54 0x07>; /* 1: reg 0x54, bit 2:0 */
 262                 };
 263         };
 264
 265         i2c-mux@77 {
 266                 compatible = "nxp,pca9547";
 267                 reg = <0x77>;
 268                 #address-cells = <1>;
 269                 #size-cells = <0>;
 270
 271                 i2c@2 {
 272                         #address-cells = <1>;
 273                         #size-cells = <0>;
 274                         reg = <0x2>;
 275
 276                         power-monitor@40 {
 277                                 compatible = "ti,ina220";
 278                                 reg = <0x40>;
 279                                 shunt-resistor = <500>;
 280                         };
 281
 282                         power-monitor@41 {
 283                                 compatible = "ti,ina220";
 284                                 reg = <0x41>;
 285                                 shunt-resistor = <1000>;
 286                         };
 287                 };
 288
 289                 i2c@3 {
 290                         #address-cells = <1>;
 291                         #size-cells = <0>;
 292                         reg = <0x3>;
 293
 294                         temperature-sensor@4c {
 295                                 compatible = "nxp,sa56004";
 296                                 reg = <0x4c>;
 297                                 vcc-supply = <&sb_3v3>;
 298                         };
 299
 300                         rtc@51 {
 301                                 compatible = "nxp,pcf2129";
 302                                 reg = <0x51>;
 303                         };
 304                 };
 305         };
 306 };
 307
 308 &sata0 {
 309         status = "okay";
 310 };
 311
 312 &sata1 {
 313         status = "okay";
 314 };
 315
 316 &sata2 {
 317         status = "okay";
 318 };
 319
 320 &sata3 {
 321         status = "okay";
 322 };
 323
 324 &uart0 {
 325         status = "okay";
 326 };
 327
 328 &uart1 {
 329         status = "okay";
 330 };
 331
 332 &usb0 {
 333         status = "okay";
 334 };