WIP FPC-III support
[linux/fpc-iii.git] / arch / arm64 / boot / dts / freescale / imx8mm-ddr4-evk.dts
blob6c079c0a3a485c862b9dddccdaf6910d89c0bb30
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright 2020 NXP
4  */
6 /dts-v1/;
8 #include "imx8mm-evk.dtsi"
10 / {
11         model = "FSL i.MX8MM DDR4 EVK with CYW43455 WIFI/BT board";
12         compatible = "fsl,imx8mm-ddr4-evk", "fsl,imx8mm";
14         leds {
15                 pinctrl-0 = <&pinctrl_gpio_led_2>;
17                 status {
18                         gpios = <&gpio3 4 GPIO_ACTIVE_LOW>;
19                 };
20         };
23 &gpmi {
24         pinctrl-names = "default";
25         pinctrl-0 = <&pinctrl_gpmi_nand>;
26         nand-on-flash-bbt;
27         status = "okay";
30 &iomuxc {
31         pinctrl_gpmi_nand: gpmi-nand {
32                 fsl,pins = <
33                         MX8MM_IOMUXC_NAND_ALE_RAWNAND_ALE               0x00000096
34                         MX8MM_IOMUXC_NAND_CE0_B_RAWNAND_CE0_B           0x00000096
35                         MX8MM_IOMUXC_NAND_CE1_B_RAWNAND_CE1_B           0x00000096
36                         MX8MM_IOMUXC_NAND_CLE_RAWNAND_CLE               0x00000096
37                         MX8MM_IOMUXC_NAND_DATA00_RAWNAND_DATA00         0x00000096
38                         MX8MM_IOMUXC_NAND_DATA01_RAWNAND_DATA01         0x00000096
39                         MX8MM_IOMUXC_NAND_DATA02_RAWNAND_DATA02         0x00000096
40                         MX8MM_IOMUXC_NAND_DATA03_RAWNAND_DATA03         0x00000096
41                         MX8MM_IOMUXC_NAND_DATA04_RAWNAND_DATA04         0x00000096
42                         MX8MM_IOMUXC_NAND_DATA05_RAWNAND_DATA05         0x00000096
43                         MX8MM_IOMUXC_NAND_DATA06_RAWNAND_DATA06         0x00000096
44                         MX8MM_IOMUXC_NAND_DATA07_RAWNAND_DATA07         0x00000096
45                         MX8MM_IOMUXC_NAND_RE_B_RAWNAND_RE_B             0x00000096
46                         MX8MM_IOMUXC_NAND_READY_B_RAWNAND_READY_B       0x00000056
47                         MX8MM_IOMUXC_NAND_WE_B_RAWNAND_WE_B             0x00000096
48                         MX8MM_IOMUXC_NAND_WP_B_RAWNAND_WP_B             0x00000096
49                 >;
50         };
52         pinctrl_gpio_led_2: gpioled2grp {
53                 fsl,pins = <
54                         MX8MM_IOMUXC_NAND_CE3_B_GPIO3_IO4       0x19
55                 >;
56         };